[SI-LIST] Packaging Design Engineer Position at Altera Corporation
- From: "Geping Liu" <GLIU@xxxxxxxxxx>
- To: <si-list@xxxxxxxxxxxxx>
- Date: Mon, 28 Apr 2008 14:52:22 -0700
Altera Packaging Group has an immediate Packaging Design Engineer
opening at San Jose, CA. Please directly send your resume to Dr. Hong
Shi (hshi@xxxxxxxxxx) or Craig Myers (cmyers@xxxxxxxxxx)
The following is the detailed job description:
As a Senior MTS Design Engineer, you will develop methodology and
competency in transceiver packaging and system level performance
analysis. In this role you will perform the following:
* Analyze cost-performance effective packaging solutions for next
generation devices (beyond 40 nm)
* Establish company leadership in high speed packaging technology
advancement.
* Develop package guidelines to meet for 100Gbps and higher
transceiver performance
* Develop package performance predictive techniques.
* Set up methodology and performance baseline by simulation and
experiment validation using existing designs.
The successful candidate's minimum qualifications will include the
following:
* PhD or MSc in Electrical Engineering, or equivalent, with a
minimum of 5 years of industry experience in high-speed electrical and
microwave device and system design.
* Expertise in silicon, package and system co-design in ASIC and
FPGA areas.
* Understanding of die-packaging issues in memory interface and
serdes applications.
* Hands-on skills in field solvers such as Ansoft HFSS, Q2D, and
Sigrity PwrSI, Hspice, ADS or similar simulation tools.
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