[SI-LIST] Package Design Engineer Position at Altera Corporation

From: "Geping Liu" <GLIU@xxxxxxxxxx>
To: <si-list@xxxxxxxxxxxxx>
Date: Mon, 7 Apr 2008 17:08:05 -0700

Hi All,
            Altera Corporation Packaging Group has a package design
engineer opening as follows. If you are interested, please directly
contact Hong Shi (hshi@xxxxxxxxxx) or Craig Myers (cmyers@xxxxxxxxxx)

 

Thanks!

 

*******************

Job Title:  MTS/Sr. MTS, Package Design Engineer

 

Major Job Responsibilities

At this role, the senior individual contributor will interface with
transceiver IC design department, forward looking technology office, and
high speed transceiver and system characterization engineering team to
define packaging solution and performance specification for high-end
FPGA packages in 40G and 100G system infrastructures. The candidate
should have direct expertise and hands-on experience in ASIC, FPGA, MMIC
silicon, packaging and application system development industry or
academic research institutes.  The scope of work includes but not
limited in develop methodology and competency in transceiver packaging
and system level performance analysis; develop package guidelines to
meet performance requirements of industry standards in 40G and 100G
arena; set up methodology and performance baseline by simulation and
experiment validation, and establish Altera leadership in high speed
packaging technology advancement.

 

Qualifications: 

PhD or MSc plus 8 years industry experience in high-speed electrical and
microwave device and system designs. Expertise in silicon, package and
system co-design in ASIC, MMIC, and FPGA areas. Understanding packaging
issues in memory interface and serdes applications. Hands-on skill in
field solvers, Hspice, ADS or similar simulation EDA tools.

 



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[SI-LIST] Package Design Engineer Position at Altera Corporation

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