[SI-LIST] PI Simulations in Hyperlynx
- From: "ravi_uni_pb" <potluri.ravikumar@xxxxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Wed, 06 Mar 2013 16:08:53 -0000
Hello Everyone,
I am new to PDN simulations therefore I need some help from you to simulate my
board in hyperlynx. My board is designed to operate ADCs and DACs of 16bit at
250 MHz range for generic application (My board also includes FPGAs and other
devices for data storage and retreival operations). Now I would like to do PI
simulations to my board to find out if everything is alright. The following are
some of the questions I have:
1) Attached are the results of decoupling wizard through lumped analysis. I am
simulating for 1.2V power plane and would like to know if I need to add any
decoupling capacitors. Can you guide me looking at the results what I need to
do? Do I need to take care of those antiresonant peaks (@ around 5 MHz)? Do I
need to suppress them? Could you direct me to literature on this topic?
2) How to selected AC power pin model ? How to practically select the signal
type and shape for an application. Can you give me any example or driect me to
some sources?
3) How do I select the maximum frequency for control frequency sweep in
decoupling wizard? (How do I find the bandwidth for my generic application?)
4) Is there any benchmark design available from hyperlynx with which I can
learn PDN analysis at a good detail?
Any help on to my questions or additional inputs on this topic are highly
appriciated.
Thanking you in advance,
Ravi
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