[SI-LIST] Re: PI Analysis about Core Power Supply

  • From: steve weir <weirsi@xxxxxxxxxx>
  • To: zhang_kun@xxxxxxxxxx, si-list <si-list@xxxxxxxxxxxxx>
  • Date: Sun, 08 May 2005 11:58:18 -0700

Zhangkun, Ralf Schmitt's 2004 DesignCon paper deals with power distribution 
design from the die out.

Waiting until the first article comes-out is very risky. If your design 
group cannot tell you what the current profile, and distribution impedance 
looks like to the PCB before first article, that implies that they do not 
know what it looks like at the die.  How then, do they design the package 
correctly?  If the package is inadequate to the task, there really isn't 
much you can do on the board to fix it.  Does your packaging group just 
always over engineer the packages to be safe?

Regards,


Steve.



At 10:49 AM 5/8/2005 +0800, Zhangkun wrote:
>Dear All
>In current work, I am studying core power supply. The voltage of core 
>power is very low (0.9V-1.2V) and the power consuming is very high (dozens 
>of Amperes). There is often power integrity problem in the frequency 
>domain from 10MHz to 20MHz. The solution is very easy that discrete caps 
>should be added on the PCB.
>
>My problem is that the PI problem is found out until the first edition has 
>been produced. Then the decoupling caps is determined. I want to determine 
>the decoupling caps before the first edition is produced in order to 
>quicken the design flow. Therefore, I should know the current noise 
>source. I have been looking for the paper about how to get the core power 
>consuming in IEEE electrical library. However, I have not found any useful 
>paper.
>
>I hope I have express myself clear. Any advice is prefered.
>
>Best Regards
>
>Zhangkun
>2005.5.8
>
>
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