[SI-LIST] PCIe3 trace width(8mil) and edge distance(3 to 4 mil) between + and - of differential pairs?
- From: Dong Kim <kimdongsik_us@xxxxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Wed, 12 Jan 2011 10:44:05 -0800 (PST)
Hi,
I have 8 lane differential PCIe3 (8Gbps) signals to be routed between a BGA
component and PCIe3 edge connector on a some FR4 material board.
The distance between the ball and the edge connector pin is about 2 inches. No
via on the top layer RX pairs and one via with 0402 capacitors on the bottom
layer TX pairs.
I am using 8 mil traces width with matching 100 ohm differential impedance at
the receiver chip for 50ohm board impedance.
The distance between the edges of the "+" signal and "-" signal is 3 to 4 mil.
It is close coupling. I expect there will be some mutual coupling between the
edges.
In my past projects with high speed differential signals, I always used loose
coupling between + and - signals of a differential pair.
I am curious of the potential issues by using close coupling between the + and
- of the pairs.
The reason for close coupling is not for the concern of the potential EMI issue.
I understand board level high speed differential signals does not have EMI
issues like actual transmission cables running up on the air.
If you see a potential issue for close coupling, please let me know.
Simulation will be performed.
But, in my opinion, simulation is only as good as the tool and the parameter
can go.
I thouught it would be good idea to get some theoretical concept bounced around.
Thanks,
Dong S. Kim
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- » [SI-LIST] PCIe3 trace width(8mil) and edge distance(3 to 4 mil) between + and - of differential pairs? - Dong Kim