There isn't a solid rule. You have to engineer it for the environment you are
in and make tradeoffs when necessary. My advice: Eliminate mode conversion as
much as possible. Be watchful of a mixture of large common and/or differential
signal discontinuities in the presence of "small to moderate" amounts of mode
conversion. This can lead to high Q resonances in your SDD21 if the residual
mixed mode signal is rattling around converting back and forth aka ISI. Not to
mention the other problems with it. As for your termination from a high speed
perspective, there are many styles for different situations. You should care
about what is most important to your channel and eliminate "unwanted noise"
from being generated, if you catch my drift. If you've never used QUCS, you can
do nested parametric sweeps with built-in component models or imported
touchstones which is handy for looking at potentially thousands of different
situations at once.
Best Regards,
Ryan
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On ;
Behalf Of Boris Bakshan
Sent: Friday, October 7, 2016 3:24 PM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] PCIe differential and common impedances
Hi experts!
I have a few queries regarding PCIe Gen3/4 channel impedance.
1. If the recommended differential PCB trace impedance is 85ohms, what should
be the common impedance of the traces? if it's 25ohms then tightly coupled
differential pair is mandatory.
2. In that case, which termination values would be considered as optimal at the
receiver/transmitter to account for minimum common and differential
reflections? (assuming we have a single resistor to power/ground per single
trace)
Thank you,
Boris.
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