[SI-LIST] Re: PCIe Spacing between Tx or Rx Diff pair.

  • From: bala <balaseven@xxxxxxxxx>
  • To: Sarada.Mohanty@xxxxxxx
  • Date: Fri, 22 Feb 2013 23:37:03 +0530

Are you placing your TX/ RX pair next to each other. Then just keep 3x or
2x..if you layT X TX ,RX RX, use 6 coupled line model from ADS and simulate.
NEXT,FEXT limit is there in PCIE spec.

Regards
bala

On Fri, Feb 22, 2013 at 5:52 PM, Mohanty, Sarada <Sarada.Mohanty@xxxxxxx>wrote:

> Gert/Muhamed,
>
> Thanks .Currently I am using 12 layer with trace width and spacing  4.50 /
> 6.50 mil in Stripline , 4.25 / 5.75 in microstrip
> I believe 18mil spacing in stripline and 12.75 in microstrip line between
> differential pair would be fine.
>
> Regards,
> Sarada
>
> -----Original Message-----
> From: Havermann, Gert [mailto:Gert.Havermann@xxxxxxxxxxx]
> Sent: Friday, February 22, 2013 5:19 PM
> To: Muhamed.Semic@xxxxxxxxxx; Mohanty, Sarada; si-list@xxxxxxxxxxxxx
> Subject: AW: PCIe Spacing between Tx or Rx Diff pair.
>
> Muhammed, the tracewidth is already dependent on the stack up, multiples
> of trace width are a very good rule of thumb.
>
> Sarada,
> For striplines 5x tw is usually no meaningful crosstalk. At 4x tw the
> coupling is higher but still ok with PCIe in most cases.
> For tighter coupling you would have to do simulations to find out if you
> meet the performance.
>
> BR
> Gert
>
>
> ----------------------------------------
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>
> -----Ursprüngliche Nachricht-----
> Von: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
> Im Auftrag von Muhamed Semic
> Gesendet: Freitag, 22. Februar 2013 12:38
> An: Sarada.Mohanty@xxxxxxx; si-list@xxxxxxxxxxxxx
> Betreff: [SI-LIST] Re: PCIe Spacing between Tx or Rx Diff pair.
>
> It is all depends on the stack-up, diff. pair track/gap spacing and length
> they run in parallel  to each other on the layout.
>
> Regards,
> M. Semic
>
> -----Original Message-----
> From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
> On Behalf Of Mohanty, Sarada
> Sent: 22 February 2013 11:32
> To: si-list@xxxxxxxxxxxxx
> Subject: [SI-LIST] PCIe Spacing between Tx or Rx Diff pair.
>
> Hi All,
> Could anyone tell me what the spacing we need maintain between diff
> pairs(TX & RX) for PCIe2 Gen 2.
>
> As per below snapshot, it will be 4x the trace width .If my understanding
> is wrong ,please correct me.
>
> [cid:image002.jpg@01CE111E.4F804320]
>
> Regards,
> Sarada
>
>
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-- 
bala

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