[SI-LIST] Re: PCIe Gen3
- From: "Ken Cantrell" <Ken.Cantrell@xxxxxxxxxxxxxxxx>
- To: <karthikeyavelan.kandasamy@xxxxxxxxx>, <si-list@xxxxxxxxxxxxx>
- Date: Thu, 2 Feb 2012 07:51:48 -0700
Karthik,
I would start by getting the Gen3 specifications, and figure it out from
there.
Ken
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx
[mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of
karthikeyavelan.kandasamy@xxxxxxxxx
Sent: Thursday, February 02, 2012 3:32 AM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] PCIe Gen3
Hi Experts
I want to do PCIe Gen3 (8Gb/s) simulations.
What is maximum trace length allowable for PCIe Gen3. Or
What is the insertion and return loss allowable.
Please guide me to minimize the simulations time.
Regards
Karthik
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