[SI-LIST] Re: PCIX Clock routing and connector
- From: "Andrew Ingraham" <a.ingraham@xxxxxxxx>
- To: <si-list@xxxxxxxxxxxxx>
- Date: Tue, 17 Aug 2004 21:29:57 -0400
> 1. The onboard Clock is routed 2.5" less than the ADD
> ON Card clock length.
I think you meant it the other way around, right?
> 2. On scopeshot the onboard clock is lagging by about
> 160 ps than the clock on the ADD ON Card. Both
> measurements are taken under the Balls of BGA.
Lagging, or leading?
> 4. It looks like the PCI connector and the
> cooresponding vias adds a delay of the order 150 ps.
Yes, that's about right. (I think it was 160 ps that I used in my PCI clock
calculations.)
But if the clock at the on-board device is lagging that on the add-on card
(see #2 above), then the 160 ps skew you see is not because of the PCI
connector alone. That delay would have made the on-board device's clock
lead the other clock, all other things being equal.
Keep in mind that conclusions based on your measurements are only really
valid for equivalent devices on the ends of the clock traces. Some PCI ICs
have distinctly different loading (input capacitance) and can cause a
significant skew of its own. It should be within the 500 ps allocated.
Try some other PCI-X and PCI add-in cards in the slot to see what the
measured skew does.
> 5. Under the light of above result, is it ok to route
> the system board clk longer by 3.5" rather than 2.5"
> than the clk going to PCI slot. Has anyone done that.
Yes, it is OK to adjust the clock length as you described to account for the
"missing" connector to the on-board device. I've always done it.
Regards,
Andy
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