[SI-LIST] Re: PCI-X (133Mhz) bus terminations
- From: "George Peterson" <George_Peterson@xxxxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Fri, 2 Jun 2006 10:23:06 -0400
=20
I agree with everything mentioned. Specific design formula's don't exist
but it's easy to create a design or topology
library by simulating worst case timing with "spec-strength" models.
Both star- and daisy- patterns are possible and it's also possible that
terminations are not necessary (but always
a good idea). Two load PCIX-133 buses require very detailed
design...even with segment lengths as short as 2 inches.
Best Regards,
George Peterson
Sr. Signal Integrity Engineer
Jabil Circuit, Inc.
(727) 803-3743
george_peterson@xxxxxxxxx
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of Peterson, James F (FL51)
Sent: Thursday, June 01, 2006 8:07 AM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: PCI-X (133Mhz) bus terminations
If you are going to ask a topology question like this, a good way to ask
it is from a timing perspective like Chris has asked below. With PCIx
133 I believe you get 2ns to get the signals to settle down on your pcb.
Can you meet that with your topology? Probably, but I would still try
for the best solution and verify it, trying to reserve as many hundreds
of picoseconds as possible for margin....
Jim=3D20
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of Chris Cheng
Sent: Wednesday, May 31, 2006 10:03 PM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: PCI-X (133Mhz) bus terminations
Do you really worry about a 2 inch PCIX net running at 133MHz ?
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of Mcgrath, Christopher
Sent: Wednesday, May 31, 2006 5:32 PM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: PCI-X (133Mhz) bus terminations
You'll have to simulate this one.
When you're not doing point-to-point on 133MHz PCIX, I have never found
a formula. You may have to play with topologies and line length
constraints and balance them against your physical constraints of the
board, but provided you are in a closed system (no PCI connector cards),
simulation should yield a solution. =3D20
-Chris
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx
[mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of Babid A
Sent: Wednesday, May 31, 2006 2:16 PM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] PCI-X (133Mhz) bus terminations
Hello,
I have PCI-X bus(133Mhz) driver with a fan out of 2. What is the best
wiring topology & termination for this case?
Drvier <> 57ohm transmission line (2inch) =3D<>Receiver 1 & 2
-Thanks,
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