Hi people =), I'm working on a board with a PCI-X (66Mhz) and a PCI (33Mhz) bus. Both busses are point to point embedded busses. According to specs the minimum length of a PCI bus seems to be ~95mm. Given the number of signals and the fact that the optimal length is ~3cm I understand the PCB designers frustrations! Thus I'd like to relax the minimum length constraint... Has anyone looked into "short PCI busses"? I see two possible issues: 1. Bus being too short for transmission line theory to apply. Possibly affecting signal levels. 2. Timing for host reads: The data will arrive earlier than "expected" due to the shorter clock (out) and data (return) propagation. My googling provided no usable results. Perhaps you guys would have a hint or two? Cheers, Anders ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List FAQ wiki page is located at: http://si-list.org/wiki/wiki.pl?Si-List_FAQ List technical documents are available at: http://www.si-list.org List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu