[SI-LIST] Re: PCI Timing Q?
- From: "Peterson, George W" <george.w.peterson@xxxxxxxxx>
- To: "'Andrew.Ingraham@xxxxxx'" <Andrew.Ingraham@xxxxxx>
- Date: Wed, 29 May 2002 09:19:52 -0700
Andrew (or anyone really...),
How accurate is a Tval estimation from measuring it on a
component that is still on the motherboard?
Assuming the part is able to do a first incident drive through
the thresholds, can we calculate line capacitance then compare
to the 10pF test load, make some estimations, then arrive at a
reasonable Tval?
Thanks,
George
-----Original Message-----
From: Ingraham, Andrew [mailto:Andrew.Ingraham@xxxxxx]
Sent: Wednesday, May 29, 2002 8:53 AM
To: brahim@xxxxxxxxxxxx
Cc: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: PCI Timing Q?
> Is Tval(max) measured relative to clk(i) and Tval(min) measured
> relative to clk(i+1)?
Tval(max) would be used along with Tsu, Tprop(max), and Tskew when
checking the transfer of data from clk(i) at the driver to clk(i+1) at
the receiver.
Tval(min) would be used along with Th, Tprop(min), and Tskew when making
sure that the data from clk(i) at the driver doesn't get caught by
clk(i) at the receiver.
Andy
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