[SI-LIST] Re: PCI Bus Routing
- From: "Ludvik" <kindl@xxxxxxxxxxxxxx>
- To: <MikonCons@xxxxxxx>, <si-list@xxxxxxxxxxxxx>
- Date: Sat, 14 Jun 2003 18:36:05 -0700
Mike,
Are you developing your own models in HSPICE? I would be greatly =
interested
to read your upcoming paper on it.=20
Ludvik
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] =
On
Behalf Of MikonCons@xxxxxxx
Sent: Tuesday, June 03, 2003 15:06
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: PCI Bus Routing
Douglas:
I do not use an IBIS-compatible simulator; therefore, I generated my own =
SPICE-based equivalent topology to accommodate different source and sink =
resistors, voltage-dependent chip capacitance loading, and VCC-dependent
slew rates to=20
match the PCI Specification limits. I've also added time delays and =
other=20
refinements. This model structure can be tailored to match any vendor's
published=20
IBIS model data to assess other than worst-case specification =
performance=20
limits.
Since I am considering publishing a paper on this modeling technique, I=20
consider the details proprietary at this point in time. Otherwise, I =
would
forward=20
the details to you.
Developing your own models will give you better insight into the device=20
operations (and limitations) anyway. It's a good exercise.
Mike
Michael L. Conn
Owner/Principal Consultant
Mikon Consulting
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