[SI-LIST] Re: PCB thickness
- From: steve weir <weirsi@xxxxxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Sat, 02 Feb 2013 06:09:36 -0800
You are looking for 0.47mm additional thickness, 0.12 mm or so should be easily
available in each of the prepregs: L1-L2, L3-L4, L5-L6, and L7-L8 without
requiring significant change to line widths for impedance control on L3, L5, or
L6. You should be specifying the laminates used. I don't like this stackup
from either SI or PI but that is another issue.
L1: Fan out/GND
pp
L2: GND
core
L3: Sig
pp
L4: PWR
core
L5: Sig
pp
L6: Sig
core
L7: GND
pp
L8: Fan out/GND
Steve
On 2/2/2013 12:56 AM, Hithesh wrote:
> Istvan,
> Thanks for the reply.
> I did ask them to increase the dielectric thickness between L3-L4 and L5-L6.
> They said they cannot do it. I have no idea why they can't do it.
>
> -Hithesh
>
>
>
> On Sat, Feb 2, 2013 at 2:01 PM, Istvan Novak <istvan.novak@xxxxxxxxxxx>wrote:
>
>> Hi Hithesh,
>>
>> Different fab houses may have access to, or may prefer to use, different
>> laminates.
>> With your stackup, however, there seems to be a very simple solution.
>> Unless
>> you use L5 and L6 for broadside coupled differential routing, you can ask
>> the second
>> fab house to add board thickness by increasing the L3-L4 and L5-L6
>> thicknesses
>> by the same amount so that the total board thickness comes closer to your
>> target.
>>
>> Regards,
>>
>> Istvan Novak
>> Oracle
>>
>>
>>
>>
>> On 2/2/2013 12:11 AM, Hithesh wrote:
>>
>>> Hi,
>>> It's an 8 layer board.
>>> Stack up below
>>> L1: Fan out/GND
>>> L2: GND
>>> L3: Sig
>>> L4: PWR
>>> L5: Sig
>>> L6: Sig
>>> L7: GND
>>> L8: Fan out/GND
>>>
>>> The Cu thickness is 1oz on inner layers and 1oz finished thickness on
>>> outer
>>> layers.
>>> The Er/dielectric is left to the fab house.
>>> The board has high speed USB diff signals and DDR2 (133MHz).
>>>
>>> We use different Fab house for protos and production. The proto Fab house
>>> did not have any difficulty achieving board thickness and our impedance
>>> requirement. But the production Fab house wants to reduce PCB thickness
>>> and
>>> modify dielectric thickness.
>>>
>>> Regards
>>> -Hithesh
>>>
>>>
>>> On Sat, Feb 2, 2013 at 1:32 PM, Nobuyuki Kunito <kunito@xxxxxxxxxxx>
>>> wrote:
>>>
>>> Hithesh,
>>>> First of all, please tell us:
>>>> How many layers the PCB have?
>>>> Layer construction and/or stack up (the thickness of metal, dielectric
>>>> material and Er of each dielectric material etc.)
>>>> I am guessing that the PCB fib house may change the dielectric material..
>>>>
>>>> Please give us the information above first.
>>>>
>>>> Regards,
>>>> Nobuyuki Kunito.
>>>> The president of Debug Lab.
>>>> http://debuglab.jp
>>>> (Sorry, Japanese only now. English page will be coming soon)
>>>>
>>>> (2013/02/02 15:17), Hithesh wrote:
>>>>
>>>>> Hi,
>>>>> What is the impact of changing PCB thickness?
>>>>> To cut a long story short, the PCB fab house we use said they can't meet
>>>>> our impedance requirement and achieve board thickness of 1.6mm.
>>>>> They have to reduce the board thickness to 1.13mm to meet impedance
>>>>> requirement.
>>>>> He did say they could achieve both when we sent them the stack up pdf.
>>>>>
>>>> But
>>>>
>>>>> now they said they can't take decisions just based on stack up.
>>>>>
>>>>> Regards
>>>>> -Hithesh
>>>>>
>>>>>
>>>>>
>>
>
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