[SI-LIST] Re: PCB stackup material properties for a fee?

  • From: "Gareth Baron" <Gareth.Baron@xxxxxxx>
  • To: <steven.salkow@xxxxxxxx>, <leeritchey@xxxxxxxxxxxxx>,"Ken Cantrell" <Ken.Cantrell@xxxxxxxxxxxxxxxx>,<tony_dunbar@xxxxxxxxxxx>, <si-list@xxxxxxxxxxxxx>
  • Date: Thu, 15 Apr 2004 17:48:39 -0700

I would suggest being careful about allowing the PCB vendor to change =
the
dielectric thickness.  This can kill you from an X-Talk standpoint.  You
ideally want the trace separation from a plane to be as close as =
possible
since this will allow the magnetic field to couple into the plane first
opposed to a nearby victim trace.  Basically don't give the vendor full
control over the height [plane to trace separation] - give them a =
maximum
allowable separation.


There are a few things you can change for Impedance:

1)      Change your trace separation if you decide to change the dielectric
thickness (you'll need to calculate allowable X-talk).

2)      Change the width of the trace.

3)      Change the dielectric material  ($$$$) !


Gareth.

-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx
[mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of Salkow, Steven
Sent: Thursday, April 15, 2004 1:21 PM
To: leeritchey@xxxxxxxxxxxxx; Ken Cantrell; tony_dunbar@xxxxxxxxxxx;
si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: PCB stackup material properties for a fee?


Specify what is needed on your fabrication drawing for the impedance of
the various line widths of your design for both Microstrip and
stripline, layer by layer or by signal group. Specify that the
fabricator may adjust trace width and or dielectric thickness, as
required to meet these requirements. Lastly provide a tolerance for the
acceptable range i.e.: X traces =3D 75 Ohms +/- 5 %, y traces =3D 50 =
ohms
+/- 5 %, etc.
Provide or request coupons on each fab panel of trace types x through z
traces so your QA can inspect for impedance. Never mind the Er. It
varies lot to lot, vendor to vendor. If you must maintain and overall
board thickness, the vendor will attempt to met your design
requirements by varying the dielectric material, if needed.=20

Loss factor is material dependent. The low loss stuff is  .002 or less
but you can expect to pay more for it and it is not necessarily
available in all thicknesses. Thermal properties are also material
dependent and if soldering large BGA, the CTE is a consideration not to
be ignored.

Steve Salkow


-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx
[mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of Lee Ritchey
Sent: Thursday, April 15, 2004 9:41 AM
To: Ken Cantrell; tony_dunbar@xxxxxxxxxxx; si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: PCB stackup material properties for a fee?


Same here.  Who is this fabricator?  The laminate manufacturers will all
gladly supply you with that data.


Lee W. Ritchey
Speeding Edge
P. O. Box 2194
Glen Ellen, CA 95442
Phone- 707-568-3983
FAX-    707-568-3504

I just took the energy it took to be angry and wrote some blues.
Count Basie


> [Original Message]
> From: Ken Cantrell <Ken.Cantrell@xxxxxxxxxxxxxxxx>
> To: <tony_dunbar@xxxxxxxxxxx>; <si-list@xxxxxxxxxxxxx>
> Date: 4/15/2004 8:05:39 AM
> Subject: [SI-LIST] Re: PCB stackup material properties for a fee?
>
> Never.  Sounds pretty strange to me.
>
> -----Original Message-----
> From: si-list-bounce@xxxxxxxxxxxxx
> [mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of Dunbar, Tony
> Sent: Wednesday, April 14, 2004 4:33 PM
> To: 'si-list@xxxxxxxxxxxxx'
> Subject: [SI-LIST] PCB stackup material properties for a fee?
>
>
> Has anyone experienced - or care to comment upon - a board vendor
asking
> a fee ($100 in this case) to supply dielectric property information
(Er,
> Loss Tangent, etc.) to an end-user board designer?
> =20
> Thanks
> Tony
> =20
>
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