hello Sunil, The words you use to describe your design and simulation needs span a very broad set of applications and may solicit a broad range of suggestions. "RF Layout" and "impedance matching" imply to many RF/microwave/antenna type designs; call these High-Frequency applications for lack of a better term. However, "PCB parasitics", "RLGC", "extraction" imply what are typically called High-Speed applications. Having worked for EDA companies in each of these two domains I have personally experienced applications strongly focused in each domain that could generally (and accurately) be described with the words you used. Though the two application areas have significant overlap, EDA design tools are usually focused on one of these two domains and typically not as strong in the other. Before making suggestions for what tools to use one should ask you a number of questions to classify your needs. Without knowing more detail about your specific application many of the answers you receive will either be an endorsement of the responder's favorite tool or promotion of the tool sold by the company for whom the responder works. To help classify your needs you could describe whether you are trying more to achieve "controlled impedance" routing or if you are trying more to achieve input/output matching for an RF power amplifier. cheers, -Brad Sigrity > -----Original Message----- > From: si-list-bounce@xxxxxxxxxxxxx > [mailto:si-list-bounce@xxxxxxxxxxxxx] On Behalf Of sunil bharadwaz > Sent: Saturday, November 05, 2011 4:01 AM > To: SI LIST > Subject: [SI-LIST] PCB parastic extraction > > Hi All , > I'am trying to extract the PCB parasitics for RF Layout in > the process of doing impedance matching for a critical > circuitry.Freq :: 2- 6 Ghz. > > I have few queries as listed below in this regards .. > > For a loss'y transmission line the representation should be as RLGC. > However , most of these extraction tools seem to be > extracting merely L , C ( independent of frequency ) & R as > frequency dependent skin effect.Should the di-electric > related losses be considered as "G " ? > > Are there tools which extract the PCB parasitics directly in > terms of RLGC ? > > I believe most of the PCB extraction tools are based on 2D > field simulators. > Hence , the extraction does not make sense when there is a > split plane . > Is the only option is to go for 3D EM simulators ? > > If we go for 3D EM simulators , will they be able to extract > from the PCB gerbers directly ? > > Can you pls throw some light on the above issues including > the relevant tools ? > > Thanks in Advance !! > > Regards > Sunil > ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List technical documents are available at: http://www.si-list.net List archives are viewable at: //www.freelists.org/archives/si-list Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu