[SI-LIST] Re: PCB Warpage during Assembly
- From: "Shawn Arnold" <shawn@xxxxxxxxxxxxxxxxxxxxxxxx>
- To: <rakesh@xxxxxxxxxxxxx>, "'si-list'" <si-list@xxxxxxxxxxxxx>
- Date: Mon, 22 May 2006 11:08:44 -0700
Ray has been nice enough to place the spreadsheet created onto the
server for download by anyone that would like to comment on Rakesh's
problem.
Here is the URL where the file can be accessed:
http://si-list.org/files/tech_files/Bitmapper%205_22_06.xls
Lee touched on the problem, sometimes there is disconnect between the
PCB designers, Electrical designers, SI folks and the fabricator that
can be solved with open intelligent communication and negotiation,
previous to release to fabrication.
Regards,
Shawn Arnold
High-Speed-Solutions and Design
408-358-8714 office
408-348-4652 cell
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of RakeshBit
Sent: Sunday, May 21, 2006 10:49 PM
To: si-list
Subject: [SI-LIST] PCB Warpage during Assembly
Importance: High
Hi,
We have designed a PCI based board which has 4-Spartan3 FPGAs. ( FF1152
package - plastic pack)
The PCB size is 210 mm by 170 mm
The layer stack is as follows.
0.0325 Copper palting layer 1 5.5 mil trace width, 50 ohms single ended
0.0175 Copper foil layer 1 0.0940 Prepreg 1 - 2 0.0350 Copper foil layer
2 plane 0.1524 Core 2 - 3 0.0350 Copper foil layer 3 5 mil trace width,
50 ohms single ended 0.1778 Prepreg 3 - 4 0.0350 Copper foil layer 4
plane 0.1016 Core 4 - 5 0.0350 Copper foil layer 5 4.4 mil trace width,
50 ohms single ended 0.0940 Prepreg 5 - 6 0.0350 Copper foil layer 6 4.4
mil trace width, 50 ohms single ended 0.1016 Core 6 - 7 0.0350 Copper
foil layer 7 plane 0.1016 Prepreg 7 - 8 0.0350 Copper foil layer 8 4.5
mil trace width, 50 ohms single ended 0.0762 Core 8 - 9 0.0350 Copper
foil layer 9 4.5 mil trace width, 50 ohms single ended 0.1016 Prepreg 9
- 10 0.0350 Copper foil layer 10 plane 0.0762 Core 10 - 11 0.0350 Copper
foil layer 11 plane 0.0940 Prepreg 11 - 12 0.0175 Copper foil layer 12
0.0325 Copper plating layer 12 5.5 mil trace width, 50 ohms single ended
1.6209 Total PCB thickness in mm
The problem we are facing is that there is excessive warping of the PCB
during assembly.
we tried chaning the stack, and are now contemplating copper balance /
copper fill on all layer.?
Could any one please throw light on what could be the problem, as we
have
taken 3-trials and all have failed.
Please guide.
with warm regards
Rakesh Mehta
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