The disadvantage is that at every transition (package<->board, connectors and signal vias), one will have to provide return paths for both AGND and POWER_ANALOG. So, using only AGND as the reference would make it easier to provide return paths and avoid impedance discontinuities. Thanks, Vinu Chris Landrum x311 wrote: >I see no advantage... >-----Original Message----- >From: Vinu Arumugham [mailto:vinu@xxxxxxxxx] >Sent: Wednesday, January 21, 2004 5:44 PM >To: 'Nosovitski, Alexander (Contr)' >Cc: clandrum@xxxxxxxxx; 'si-list@xxxxxxxxxxxxx' >Subject: Re: [SI-LIST] Re: PCB STACKUP > > >What's the advantage (other than layer count) of routing DIFF_SIGNAL >referenced to AGND and POWER_ANALOG instead of using a single stripline >referenced to two GND or AGND planes? > >Thanks, >Vinu > >Chris Landrum x311 wrote: > > >Alexander, > > > >I would be inclined to say you do not need the AGND planes. Without knowing > >the intricate parts of your design, I would say that tying AGND and GND > >together at a backplane will be a BAD idea. With the information at hand, I > >would assume you are using the AGND to somehow "benefit" the Gb/s signals. > >I would argue, that if this is the case, and you tie the AGND to GND > >together at the backplane, you could easily hurt the design especially from > >an EMI perspective, as you may induce loop currents. > > > >On another note, tt looks like you have good inner-planar capacitance built > >into the design....which is good. I would suggest that you make sure you > >have built this capacitance for all the power supplies in your design. > >Also, I notice that there are many PWR/GND plane pairs towards the center of > >the board. If you intend these structures (the ones toward the middle > >layers) to provide inner planar capacitance, I might argue that the > >inductance of the vias used to attach the planes may be great enough to > >offset the benefit of the inner-planar capacitor. As such, you may be able > >to get rid of some of the internal planes to save cost. Now, if you have > >current or voltage requirements that require this many planes, then by all > >means, what you have designed is correct. > > > >Just my thoughts...for what they are worth. > > > >-----Original Message----- > >From: Nosovitski, Alexander (Contr) > >[ mailto:alexander.nosovitski@xxxxxxx <mailto:alexander.nosovitski@xxxxxxx> >] > >Sent: Wednesday, January 21, 2004 4:44 PM > >To: 'Chris Landrum x311' > >Subject: RE: [SI-LIST] PCB STACKUP > > > > > >Hi Chris, > > > >Yes, AGND and GND will be tied together. > >I am not sure yet if it is going to be at the backplane or > >at the board. > > > >Regards, > > > >Alexander > > > > > > > >-----Original Message----- > >From: Chris Landrum x311 [ mailto:clandrum@xxxxxxxxx ><mailto:clandrum@xxxxxxxxx> ] > >Sent: Wednesday, January 21, 2004 4:18 PM > >To: Nosovitski, Alexander (Contr); si-list@xxxxxxxxxxxxx ><mailto:si-list@xxxxxxxxxxxxx> > >Subject: RE: [SI-LIST] PCB STACKUP > > > > > >The first thing that pops out to me is whether or not the AGND and GND > >layers will all be tied together. If not, then what is the purpose of the > >AGND layers? > > > >-----Original Message----- > >From: Nosovitski, Alexander (Contr) > >[ mailto:alexander.nosovitski@xxxxxxx <mailto:alexander.nosovitski@xxxxxxx> >] > >Sent: Wednesday, January 21, 2004 4:03 PM > >To: si-list@xxxxxxxxxxxxx <mailto:si-list@xxxxxxxxxxxxx> > >Subject: [SI-LIST] PCB STACKUP > > > > > >Hello si-list, > > > > > >The design I am working on has a dense placement. > > > >The proposed stack up looks as follow: > > > >TOP > >POWER_ANALOG > >DIFF_SIGNAL (Gb/s signals) > >AGND > > > >GND > >POWER > >S > >S > >GND > >POWER > >S > >S > >GND > >SPLIT_POWER > >GND > >S > >S > >POWER > >GND > >S > >S > >GND > > > >AGND > >DIFF_SIGNAL_ANALOG (Gb/s signals) > >POWER ANALOG > > > >BOTTOM > > > > > > > >All signal layers are 0.5 Oz copper and > > > >All planes are solid ( except one in the middle) with 0.5 Oz copper. > > > >The diff. signals are running at 2.5Gb/s. > > > > > >There are different opinions about analog plane location. > > > >Could the arrangement above cause a problem? > > > >What else should I be concern about? > > > > > > > >Any help or suggestion is appreciated! > > > > > >Regards, > > > >Alexander Nosovitski > > > > > > > > > > > > > > > > > > > > > > > > > > > >-----Original Message----- > >From: Salkow, Steven [ mailto:steven.salkow@xxxxxxxx ><mailto:steven.salkow@xxxxxxxx> ] > >Sent: Wednesday, January 21, 2004 1:57 PM > >To: weirsp@xxxxxxxxxx <mailto:weirsp@xxxxxxxxxx> ; fred@xxxxxxxxxxxxx ><mailto:fred@xxxxxxxxxxxxx> ; kar_thik_v1@xxxxxxxxx ><mailto:kar_thik_v1@xxxxxxxxx> > >Cc: si-list@xxxxxxxxxxxxx <mailto:si-list@xxxxxxxxxxxxx> > >Subject: [SI-LIST] Re: Looking for thin dielectric tape > > > > > >4 mil prepreg (pcb laminate) is generally available from anyone doing > >multilayer PCB. You may also get samples from laminate vendors (dupont, > >Norplex) (sprayed with Scotch 444 adhesive for cold adhesion to copper > >foils) > >3M (tape division) have exactly what your looking for up to 36" wide > >slit to any width but they have minimum qtys > > > >see > >http://products3.3m.com/catalog/us/en001/utilities_telecom/oem_electrica ><http://products3.3m.com/catalog/us/en001/utilities_telecom/oem_electrica> > >l/node_R5MTBSFVGPbe/root_GST1T4S9TCgv/vroot_GSHBRQT7DVge/gvel_BBGZX3B1QG > >gl/theme_us_oemeletrical_3_0/command_AbcPageHandler/output_html > > > >Catalog on the above page for download > > > >Steve Salkow > >Lockheed Martin > >3200 Zanker Road > >San Jose, CA 95134 > >(408) 473-4058 (san Jose) > >(408) 742-4162 (Sunnyvale) > >steven.salkow@xxxxxxxx <mailto:steven.salkow@xxxxxxxx> > >salkow@xxxxxxxxxxxx <mailto:salkow@xxxxxxxxxxxx> > >(925) 462-1075 Home > >(925-) 487-5946 Cell > >(408) 468-7271 Numeric Pager > > > >-----Original Message----- > >From: si-list-bounce@xxxxxxxxxxxxx <mailto:si-list-bounce@xxxxxxxxxxxxx> > >[ mailto:si-list-bounce@xxxxxxxxxxxxx <mailto:si-list-bounce@xxxxxxxxxxxxx> >]On Behalf Of steve weir > >Sent: Tuesday, January 20, 2004 11:17 PM > >To: fred@xxxxxxxxxxxxx <mailto:fred@xxxxxxxxxxxxx> ; kar_thik_v1@xxxxxxxxx ><mailto:kar_thik_v1@xxxxxxxxx> > >Cc: si-list@xxxxxxxxxxxxx <mailto:si-list@xxxxxxxxxxxxx> > >Subject: [SI-LIST] Re: Looking for thin dielectric tape > > > > > >If you want to lay out a board, onesy, twosy, Express PCB is not a bad > >way > >to go. www.expresspcb.com <http://www.expresspcb.com> It sure beats the >Bishop Graphics adhesive > >backed Cu tape, or a bathroom full of ferric chloride. > > > >Steve. > >At 01:44 PM 1/20/2004 -0800, Fred Townsend wrote: > > > >The last time I check you could still get mylar sheeting at most > >drafting and staionary stores. You would to apply your own adhesive. > >Comes in 4 and 7 mil thicknesses. You can also get polyester sheeting > >frosted one side and adhesive on the other for making labels. Failing > >that how about 3M's double sticky magic tape? > > > >Fred Townsend > > > >Karthik V wrote: > > > > > >Hello, > > > > I am a student at the State University of New York. I am > > > >looking for a double sided sticky dielectric tape (more like a sheet ) > > > >of > > > >thickness about 4mils (0.1mm) and with a dielectric constant of > >around 4, to use between copper sheets - to make a "temporary board". > > > >I > > > >tried things like epoxy, but it's almost impossible to get it so thin > > > >and > > > >still provide infinite DC resistance. > > > > Could anyone point me to places where I could look for this > > > > > > > >kind of stuff. Is there anything else I could try to get the > > > >dielectric > > > >(with Dk around 4) so thin ( apart from elaborate processes ) . > > > >thanks in advance, > >Karthik, > > > >--------------------------------- > >Do you Yahoo!? > >Yahoo! Hotjobs: Enter the "Signing Bonus" Sweepstakes > > > >------------------------------------------------------------------ > >To unsubscribe from si-list: > >si-list-request@xxxxxxxxxxxxx <mailto:si-list-request@xxxxxxxxxxxxx> with >'unsubscribe' in the Subject field > > > >or to administer your membership from a web page, go to: > >//www.freelists.org/webpage/si-list ><//www.freelists.org/webpage/si-list> > > > >For help: > >si-list-request@xxxxxxxxxxxxx <mailto:si-list-request@xxxxxxxxxxxxx> with >'help' in the Subject field > > > >List technical documents are available at: > > http://www.si-list.org <http://www.si-list.org> > > > >List archives are viewable at: > > //www.freelists.org/archives/si-list ><//www.freelists.org/archives/si-list> > >or at our remote archives: > > http://groups.yahoo.com/group/si-list/messages ><http://groups.yahoo.com/group/si-list/messages> > >Old (prior to June 6, 2001) list archives are viewable at: > > http://www.qsl.net/wb6tpu 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technical documents are available at: http://www.si-list.org List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu