[SI-LIST] PCB LAYER STACKUP
- From: Suresh R S <rssuresh.eee@xxxxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Tue, 10 Mar 2015 00:12:54 +0530
Hi,
I am going to design as VPX based high speed SBC processor module. The no.
of layer of the module, may be reach upto 20.
I have lot of doubt in Mutual inductance and capacitance, cross talk.
*Plz can share PCB layout related documents and guide lines of stack up
for high speed digital design.*
Thanks and Regards
Suresh R S
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