[SI-LIST] Oracle has an opening for a SI Engineer in Burlington, MA

From: Tom Wenners <tom.wenners@xxxxxxxxxx>
To: si-list@xxxxxxxxxxxxx
Date: Mon, 05 Aug 2013 08:48:02 -0400
Hello all,
     Oracle has an opening for an SI Engineer in Burlington, MA.  If 
interested you can apply online at the Oracle Website
using job opening IRC2289618 or you can your resume to me at 
Tom.Wenners@xxxxxxxxxx

Thanks,

Tom

Job Description:

*Sr. Signal Integrity Engineer*

Location:

Burlington, MA

Position Overview/Summary:

In this position, the Signal Integrity Engineer will perform signal 
integrity and timing analysis of DDR4 and high-speed serial interfaces 
such as PCI-E gen3. Perform lab measurements to correlate to simulation 
results and validate design margins.

Experience with specific simulation tools that are used as part of the 
Signal Integrity Analysis process include HSPICE, QuantumSI, Ansoft 
HFSS, Q3D, Cadence tools, and SI-wave.Lab experience especially in the 
use high speed test equipment for critical timing measurements is very 
important.

Duties and Responsibilities:

1.Assist with pre and post-layout simulation and timing analysis of DDR4 
memory interfaces on all of Oracleâs Intel X86 based platforms and 
Oracle Sparc platforms;

2.Assist lab design verification for Intel x86 platforms; Perform 
characterization, modeling and simulation of high speed serial 
interfaces (SERDES) such as QPI, SMI and PCI Express interfaces;

3.Carryout crosstalk analysis on multiple X86 platforms using SiAuditor 
and Cadence Allegro. It includes determining signal groups and their 
worst-case characteristics along with better design solutions;

4.Perform empirical memory interface characterization on multiple X86 
platforms which includes evaluating the margins across all the supported 
DIMM vendors, DIMM types and at various speeds;

5.Assist with the evaluation of system power for all supported DIMM 
vendors, DIMM type at the supported speeds to help Oracle optimize its 
power budget by selecting the most efficient DIMMs;

6.Performance analysis of various different memory configurations, the 
bandwidth along with the DIMM power and cost of the DIMM enable an 
efficient selection of the memory DIMMs;

7.Assist with the development and verification of design constraints 
that will guarantee the operation of the design over temperature, 
voltage, and process.

8.Assist in software development to enable high speed memory operation 
and validate the BIOS across a number of memory configurations to check 
for proper speed and voltage of operation;

Requirements:

Required Skills for this Signal Integrity Engineer position include the 
following:

  * Bachelor of Science in Electrical Engineering, or similar degree,
    with 2 to 5 years of relevant experience
  * Proven knowledge in the use of simulation and modeling tools such as
    HSPICE, QuamtumSI, Q3D, SIWave, and 3D solvers such as ANSOFT HFSS
    to develop signal and power integrity design recommendations
  * Experience with using Cadence tools such as Allegro, SigXplorer,
    constraint manager, etc.
  * Practical experience using high-speed test equipment, including
    VNAs, TDRs and Oscilloscopes, to correlate Simulation Analysis
    results and predictions to actual system performance
  * Understanding of the package and PCB Design processes
  * Understanding of Perl and any programming is a plus.
  * Excellent communication skills, both written and verbal, coupled
    with the ability to work independently and in a team environment

-- 
<http://www.oracle.com> Tom Wenners | Director Hardware Technology & Process
Phone: +1 7814422744 <tel:+1%207814422744> | Fax: +1 7814420406 
<fax:+1%207814420406> | Mobile: +1 6035664167 <tel:+1%206035664167>
Oracle Worldwide Operations
95 Network Drive | Burlington, MA 01803
<http://www.oracle.com/commitment> Oracle is committed to developing 
practices and products that help protect the environment


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[SI-LIST] Oracle has an opening for a SI Engineer in Burlington, MA

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