[SI-LIST] Re: One stitching via or more vias is better for 25Gbps application???

  • From: "Istvan Nagy" <buenos@xxxxxxxxxxx>
  • To: <leeritchey@xxxxxxxxxxxxx>, <lee.home.61@xxxxxxxxx>, <si-list@xxxxxxxxxxxxx>
  • Date: Sat, 6 Sep 2014 13:52:03 -0700

Lee,

Did you do simulations both with/without stitching vias?
Also try the simulation on a diffpair that previously (before arriving to 
the via) got some skew/imbalance. I don't know but suspect that the skewed 
diffpair will get more mode transformation if the return paths are not good. 
To be tested with simulation. It was a lot of work for us to set the signal 
via to gnd via distance to minimize reflections. Now with no gnd via, the 
signalvia to gnd via distance depends on the surrounding elements in the pcb 
layout.
How about via impedance and reflections? Without the stitching vias, the 
signal via impedance will be as much as "who knows".

Regards,
Istvan Nagy


-----Original Message----- 
From: Lee
Sent: Saturday, September 06, 2014 12:17 PM
To: lee.home.61@xxxxxxxxx ; si-list@xxxxxxxxxxxxx
Cc: lee.home.61@xxxxxxxxx
Subject: [SI-LIST] Re: One stitching via or more vias is better for 25Gbps 
application???

No stitching vias are needed.  Where did this idea get started?

-----Original Message----- 
From: Leeyuyun
Sent: Saturday, September 06, 2014 4:25 AM
To: si-list@xxxxxxxxxxxxx
Cc: lee.home.61@xxxxxxxxx
Subject: [SI-LIST] One stitching via or more vias is better for 25Gbps
application???

Hi, all
I am doing 100Gbps (4x25Gps) product now
How do we put stitching vias when high speed signal change the layer?
This is a differential pair, which has P and N
Someone told me that one stitching vias is better because P and N share the
common return
Someone told me that more stitching vias is better because loop inductance
could be reduced more
I am confused which one is better?
Can anyone help me?
Thanks,
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