Hi Lee I strongly recommend you to use HFSS in this case... First because HFSS (and other equivalent 3D EM solver) is the most accurate way to simulate very high frequency critical transition, like in your case Second, because you can have the benefit to plot E and H field on the cross section and debug the physical behavior of this structure... like see if a cavity resonance is excited, or where you have more mismatch losses, where you have stub resonances etc. Anyway with SIwave you can also do a double sanity check and simulate the entire high speed path within the full layout... this will allow you to combine SI performance with your PDN structure (SI-PI cosimulation) and see if you really excite any cavity resonance in your PDN... so you can understand where is the best location for stitching VIAs... P.S. if you are using the latest version of SIwave, I strongly recommend you to activate the 3D DDM (Domain-Decomposition-Method)... this allow you to activate a special solver for 3D critical region and increase a lot the accuracy... for further details, please contact your local ANSYS tech. support I hope this help Cheers Cristian 3D EM Modeling Staff Engineer Infineon Technologies North America 2014-09-06 5:32 GMT-07:00 Leeyuyun <lee.home.61@xxxxxxxxx>: > Hi, Steve > Thank you > I use SI wave and HFSS simulation software > Which one is better for this vias in the 25Gbps application? > Do you agree P/N share only one stitching vias with the same return path > is good? > Thank you > Lee > > > steve weir <weirsi@xxxxxxxxxx> æ¼ 2014/9/6 ä¸å7:42 寫éï¼ > > > > "It depends". In the general sense: Tighter stitching increases the > > lowest cavity resonant frequencies. However stitching is not free, and > > where stitching goes particularly close to signal vias can have a big > > impact on how the overall structure performs. > > > > If you want well controlled results that meet a particular loss budget, > > then you really need to model in a good solver. You can always contract > > with someone to design your transitions for you. There are entire > > businesses built around getting structures like this right: Teraspeed, > > Wild River, etc. > > > > Steve > >> On 9/6/2014 4:25 AM, Leeyuyun wrote: > >> Hi, all > >> I am doing 100Gbps (4x25Gps) product now > >> How do we put stitching vias when high speed signal change the layer? > >> This is a differential pair, which has P and N > >> Someone told me that one stitching vias is better because P and N share > the common return > >> Someone told me that more stitching vias is better because loop > inductance could be reduced more > >> I am confused which one is better? > >> Can anyone help me? > >> Thanks, > Lee------------------------------------------------------------------ > >> To unsubscribe from si-list: > >> si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field > >> > >> or to administer your membership from a web page, go to: > >> //www.freelists.org/webpage/si-list > >> > >> For help: > >> si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field > >> > >> > >> List forum is accessible at: > >> http://tech.groups.yahoo.com/group/si-list > >> > >> List archives are viewable at: > >> //www.freelists.org/archives/si-list > >> > >> Old (prior to June 6, 2001) list archives are viewable at: > >> http://www.qsl.net/wb6tpu > >> > >> > >> > > > > > > -- > > Steve Weir > > IPBLOX, LLC > > 1580 Grand Point Way > > MS 34689 > > Reno, NV 89523-9998 > > www.ipblox.com > > > > (775) 299-4236 Business > > (866) 675-4630 Toll-free > > (707) 780-1951 Fax > > > > All contents Copyright (c)2013 IPBLOX, LLC. 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