[SI-LIST] Re: On-die caps for IO supply
- From: "DAVID CUTHBERT" <telegrapher9@xxxxxxxxx>
- To: "Bradley Henson" <Bradley_Henson-NR@xxxxxxxxxxxx>
- Date: Thu, 10 Apr 2008 07:59:12 -0600
One issue I have encountered with on-die decoupling is power bus resonance.
This appears, in some cases, to dominate the EMC signature of the IC. Having
the ability to switch in more or less on-die capacitance would provide a
method to shift the resonant frequency if problems are encountered during
system EMC testing. Modulation of the on-die C could be used to affect a
type of spread spectrum.
Dave Cuthbert
On Wed, Apr 9, 2008 at 8:57 AM, Bradley Henson <
Bradley_Henson-NR@xxxxxxxxxxxx> wrote:
> The last std cell design I worked on was 90nm and had a DDR2-533. The
> vendor provided a scalable model for the on-die transient and IR voltage
> drop. As I recall it included die and package parasitics. We added on-die
> I/O capacitance until we meet the vendor's release requirements
> (reasonable IMO) for on-die droop/noise. Don't remember what the
> capacitance was that we ended up with per driver, but by using a special
> on-die cap, we managed to get a lot more than I thought could be possible.
> The results looked good in the lab post-fab. In any event, I don't see
> how you can proceed without detailed simulations by you or your
> semi-vendor?
> best regards and good luck
>
>
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