[SI-LIST] Re: Number of bits to simulate
- From: Hassan O. Ali <hassan@xxxxxxxx>
- To: <si-list@xxxxxxxxxxxxx>
- Date: Tue, 6 Dec 2011 11:30:27 -0500
For some reason my response was truncated. Resending...
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Hello Roopesh,
Yes, eye diagrams will always change with the number of bits.
Intersymbol interference (ISI) from channel dispersion effects,
reflections, and crosstalk, are the prime reasons for the change. ISI
and crosstalk are pattern-dependent, so their effects may be severe
when certain bits are sent/received. Multiple signal reflections
happen when the TX and RX are not impedance-matched to the channel.
If eye-opening is what you care about, for a given bit-pattern and
channel characteristics, you'll need to determine the sufficient
number of bits through iteration. Increase the number of bits
iteratively until there is acceptable difference in eye opening
between the current iteration and the previous one. I think it's fair
to assume that the "acceptable difference" is 10% of the target
voltage and time margin that you'd like the system to operate with.
In fact, 10% seems to be an acceptable tolerance for most PCB-based
systems where the manufacturing process itself has that kind of
accuracy level.
My 2 cents!
Hassan.
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On Tue 12/06/11 8:01 AM , Roopesh Badala roopesh.badala@xxxxxxxxx
[1]
sent:
Hello Experts,
We are simulating a LVDS channel of 800Mbps datarate using ibis
models &
cadence channel analysis tool utilities.
We are struck at selecting number of bits for simulation.
How do you decide on the PRBS pattern length for simulation.
with 32 bits the eye opening is good. but for higher pattern length
the eye
opening is bad.
Is there any relation between the channel length or data rate to
number of
bits to simulate.
kindly advise.
Thanks in advance
Roopesh.
Links:
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[1] mailto:roopesh.badala@xxxxxxxxx
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