Hi experts,
Has anyone done analysis on noise coupling between parallel power planes?
Searching the SI-List archives, I found this note from Istvan Novak which
points out the need to consider the issue:
https://www.freelists.org/post/si-list/Power-plane-coupling,7
Dr. Novak writes, "One way to decrease the vertical coupling is to increase
the relative separation between the two power planes. This can be done by
either increasing the absolute separation vertically between the two power
planes, or reducing the separation between the power planes and ground
planes, or a combination of both." I already practice this when possible,
but there are times when some coupling is unavoidable.
Searching online, I found this whitepaper, but it didn't really get into
practical design aspects, or variation of plane separation:
https://www.cst.com/Content/Articles/article874/CST-Whitepaper-Analyzing-Pow
er-Integrity-Issues-Power-Plane-Interaction.pdf
More specifically: In a multi-layer board, I often need a four-plane-layer
stack of GND-PWR-PWR-GND somewhere, using 1oz copper. Obviously I want the
PWR-PWR dielectric separation to be greater than the GND-PWR separations,
but how much greater? My PCBs are often limited in thickness due to
mechanical constraints, so separation greater than 4 or 5 mils (or complete
GND-PWR-GND isolation) is very challenging or completely impossible to
achieve.
One use case is where I have a FPGA core rail (maybe ~20A and fairly noisy)
on one of the power layers, and FPGA 10Gb transceiver rails on the adjacent
power layer. The transceiver rails are designed and analyzed and
appropriately bypassed to meet the stringent specifications of the FPGA
manufacturer, but my analysis considers that rail and its copper in
isolation, not factoring in coupling from an adjacent plane. I know that
"fairly noisy" is not actually a meaningful phrase, but I'm wondering if
some of the experts on the forum have already analyzed situations similar to
this.
Does anyone have good rules of thumb for the ratio between PWR-PWR and
PWR-GND in these situations? For example, if there is a 4 mil dielectric
PWR-PWR, is a 2 mil dielectric sufficient for PWR-GND, or is it recommended
to go to 1 mil dielectric (e.g. FaradFlex or Interra) PWR-GND in order to
reduce the PWR-PWR coupling? I know rules of thumb are blunt instruments,
but as Dr. Bogatin's Rule of Thumb #0 says, "an ok answer NOW! is better
than a good answer, late."
Does anyone know of any other PDFs or articles online which analyze this
situation?
Dr. Shlepnev, would you consider doing a SIMBEOR demo video evaluating
parallel plane interactions between power layers in a GND-PWR-PWR-GND
four-layer stackup? Your educational video series this year has been quite
informative.
Thanks,
Jon
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