[SI-LIST] Re: Needed - compelling examples of SI failures and associatedimpacts
- From: Mike Brown <bmgman@xxxxxxxxxx>
- To: surfsup3@xxxxxxx
- Date: Sun, 28 Mar 2004 13:15:42 -0600
It is terribly hard to know what management will consider "compelling".
Product failure in the lab, or on the production line is one. Late
delivery due to redesign is another, if there is any sensitivity to the
time value of money.
The fact that you are just getting into sensitive edge rates tells me
that you are using old technology - maybe really old. I've been
wrestling with SI issues for 25 years or more, and not working with
bleeding edge technology. A 2 inch trace can give you grief today, if
not properly driven or terminated.
Your design may be relying on slow edge rates for reliable operation,
unbeknownst to anyone. The fact is that slow edge rates can go away
almost without notice, if your vendor decides to build old part numbers
on a modern fab line. It isn't for nothing that vendors who bother to
spec a minimum prop delay on old logic often specify "0". Zero. This
gives them the latitude to build the parts with any technology
improvement they like. You may be able to pay someone to continue to
make your parts on an obsolete fab line - but they *will* become
expensive parts if you do so.
"Accidental SI" a time bomb in your system. Your design which has been
working reliably for years may stop working completely when you build it
with the latest rev of parts. Or become unreliable at some
environmental corner. I would expect your systems to be exposed to
environmental extremes that will bring out the worst in your design.
Going back a ways, I had a design that was built around a 2901 4-bit
slice. I ASS-U-MEd that the minimum Tpd was half of typical, since the
minimum was not specified by the manufacturer. That assumption was
reviewed along with the rest of the design, and passed muster. For a
while. All was well when the vendor switched to the 2901A and 2901B
(still in packages marked 2901) When they switched to 2901C a few years
later, my design began to fail in large numbers. There was a race
condition revealed by the fast part, whose Max Tpd was faster than the
minimum that I had designed to. The design was guaranteed to fail under
those conditions, and it did so. A design revision was made, under
pressure while the production line was stopped. A most uncomfortable
experience, for sure.
The above isn't exactly an SI issue, but they also hide undetected until
a fast part gets inserted into the right place in the system. It seems
that SI and timing go hand-in-hand.
A good SI group can save you from these kinds of problems by providing
design guidance in the realm of termination specs, topology definition,
etc. A robust SI design is insurance against failure in the lab, and
against later production failure.
Good luck with your management.
Mike
D wrote:
> Dear experts,
> I work for one of the largest aerospace companies in the world. Our systems
> are unbelievably complex although our digital edge rates are only recently
> starting to cause our interfaces to behave in a distributed manner. I have
> been on a crusade the past few months to convince management to form a signal
> integrity team and cast aside outdated rules of thumb and the "design it and
> hope that it works" mentality.
>
> I can't help but believe that some of you on this list have been in the same
> predicament. I am extremely interested in hearing your stories. More
> importantly, I am looking for examples and impacts of device, board, or
> system level catastrophic SI failures to help me drive home my point during
> my next attempt to show the decision makers the light.
>
> Thanks in advance for your help.
>
> Rgds,
>
> D
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