[SI-LIST] Re: Needed - compelling examples of SI failures and associated impacts
- From: "Russell D. Moser" <r.moser@xxxxxxxxxxxxxxxxx>
- To: <surfsup3@xxxxxxx>, <si-list@xxxxxxxxxxxxx>
- Date: Fri, 26 Mar 2004 15:27:15 -0500
I remember helping to design cache memory using un-terminated trace stubs
of precise topology and placement so the existence of a charge could be read
on a subsequent clock cycle (for a well-known Super-Comp mfg). Edge rates at
the time (mid to late 80s) were moving at the speed of smell; nonetheless we
had to use transmission-line analysis with the tools that we had at the
time. And I do recollect a 3-d teraflop computer circa 1989 that we (an SI
team) looked at as well.
D, have you gone to the various electromagnetic modeling software vendors
and seen their "success stories"? electromagnetic modeling and system
simulation, signal integrity and the like are fairly mature disciplines and
there are many tools and experts. What you ought not to do is to rush into
some of these tools as they have a learning curve so up front, you need to
sensitize your management that it is a commitment and should be a "core
competency".
Good Luck, I was where you are now, back in 1986. It has been a great
career.
Regards,
_________________________
Russell D. Moser
The Orion Group
r.moser@xxxxxxxxxxxxxxxxx
www.theoriongroup.net
717.503.6682 (cell)
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On
Behalf Of D
Sent: Friday, March 26, 2004 9:13 AM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Needed - compelling examples of SI failures and
associated impacts
Dear experts,
I work for one of the largest aerospace companies in the world. Our systems
are unbelievably complex although our digital edge rates are only recently
starting to cause our interfaces to behave in a distributed manner. I have
been on a crusade the past few months to convince management to form a
signal integrity team and cast aside outdated rules of thumb and the "design
it and hope that it works" mentality.
I can't help but believe that some of you on this list have been in the same
predicament. I am extremely interested in hearing your stories. More
importantly, I am looking for examples and impacts of device, board, or
system level catastrophic SI failures to help me drive home my point during
my next attempt to show the decision makers the light.
Thanks in advance for your help.
Rgds,
D
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