Dear All, I want to find out more information on via inductance and inductance of connector pins. Specifically, I am confused as to how the inductance of such structures is specified/determined. As an example, when someone says the via/pin inductance is *nH what is their assumption about the current loop? Am I right in thinking that when people talk of via inductance, they actually mean the inductance of a closed loop formed by a pair of vias divided by two? How is L typically determined? Also could someone explain the term partial inductance? If these questions have been answered earlier, I will be grateful if someone can send me the link. Thank you experts. Abhijit. ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu