[SI-LIST] Re: Need help on TDR sim
- From: Sureshkumar Ayyavu <sureshkumar.ayyavu@xxxxxxxxx>
- To: SI-LIST <si-list@xxxxxxxxxxxxx>
- Date: Thu, 2 Jan 2014 18:32:57 +0530
Hi Dudes ,
Any HSPICE experts in india ? Please mail me back. I'd like to get clear
some of my doubts on TDR simulation
THANKS
Suresh
On Mon, Dec 23, 2013 at 6:34 PM, Sureshkumar Ayyavu <
sureshkumar.ayyavu@xxxxxxxxx> wrote:
> Hi Guys ,
>
> Anybody help me to understand the TDR plot. While doing my HSPICE
> simulation , I see the inductive and capacitive peaks continuously. Guys
> please let me know if we have any defined way to determine the peaks
> location in my PCB trace.
>
> Is it correct , if we use the propagation delay of the trace to find out
> the TDR peaks location. It is not working in my case. My stripline is
> pretty clear. It is connected bt the BGA and SMA. I used the models for BGA
> and SMA. And did the seperate TDR simulation for these models too. It works
> good. So i conclude the issue is in the board touchstone file.
>
> THANKS
> Suresh
>
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