[SI-LIST] Re: Modeling a MUX/DEMUX?
- From: "Jon Powell" <jonpowell@xxxxxxxxxxxx>
- To: <brian.d.aspnes@xxxxxxxxx>, <si-list@xxxxxxxxxxxxx>
- Date: Wed, 5 Mar 2003 11:54:03 -0800
I believe there is a method in XTK for simulating these kind of MOS switches
with actual device models. I don't know if the IBIS data has what you need
for this, however.
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx
[mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of Aspnes, Brian D
Sent: Wednesday, March 05, 2003 11:44 AM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Modeling a MUX/DEMUX?
If you wanted to model the IDT MUX parts IDTQS3VH257 and IDTQS3VH253 =
for
pre-layout simulations, in a series net configuration [such that the
MUX/DEMUX is in series with your trace ("Y" to "In", with select and =
enable
"on")], how would you model the MUXs with a Single Line Lumped Model =
"SLM"
type environment (we use Innoveda Scratchpad/ePlanner which uses .ibs =
models
and "schematic" versions of connectors/bus switches). =A0
Driver -> Trace -> MUX/DEMUX -> Trace -> Receiver=20
=A0
Does anyone have a Single Line Lumped Model (SLM with one input, one =
output)
that I can use for signal integrity analysis similar to this connector =
model
from AMP (Mictor): =
http://www.amp.com/simulation/scripts/models.asp#list=20
=A0
Brian Aspnes
Intel Communications Group (ICG)
E-mail: brian.d.aspnes@xxxxxxxxx
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