[SI-LIST] Re: Microstrip/Stripline
- From: "Ken Willis" <kwillis@xxxxxxxxxxx>
- To: <si-list@xxxxxxxxxxxxx>
- Date: Mon, 19 Dec 2005 08:33:40 -0500
Hi,
Having spent the early part of my career in PCB fabrication, with
hands-on etching/microsectoning/TDRing lots of impedance-controlled
PCBs, I would still be very careful with surface microstrips for
Gbps applications. I am with Lee on this one. In traditional PCB fab
processes, there are a number of things that simply add many variables
to the external traces:
- external layers get plated up, and adds non-uniformity across the
panel to the trace geometries (trace thickess, width/spacing,
trapezoid
effect, etc.)
- surface finishes (solder, nickel/gold, soldermask, HASL) also add
significant variations across the panel
I know that it is done today, but I have simply seen much more process
variation on the external microstrip traces, especially with smaller
5 and 6 mil geometries. If your application is very sensitive to
discontinuities
and reflections, I would just tread carefully here with traditional
plate-and-etch
PCB fab processes for external layers. Maybe with new additive types of
processes,
this is much better controlled now.
Anyone care to share their experiences with that?
Ken
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of Eric Bogatin
Sent: Sunday, December 18, 2005 7:42 AM
To: si-list@xxxxxxxxxxxxx
Cc: eric@xxxxxxxxxxxxxxx; susan@xxxxxxxxxxxxxxx
Subject: [SI-LIST] Microstrip/Stripline
Jeff and others-
I just finished a study on the stack up tradeoffs for various
differential pair geometries, which will be included in a new online
lecture, OLL-183, to be posted shortly.
While it is true that, as with many of the questions asked about designs
for signal integrity, it depends, there are some definite tradeoff
issues between microstrip and stripline. In designing the stackup, three
important questions are: the interconnect density possible, the total
dielectric thickness and the attenuation per length, which influence the
ultimate bandwidth of the interconnect and the highest possible
transmitted bit rate.=20
Microstrip, wins on all counts. You can build 100 Ohm differential pairs
with a tighter pitch in microstrip than stripline, with a dielectric
thickness that is about a quarter that of stripline for the same width
lines, and with an attenuation that is 30% reduced from stripline. The
attenuation reduction is dominated by the lower effective dielectric
constant and the lower contribution to the dielectric loss from the
field lines that are in the air.
The conductor losses, for the same line widths are pretty close, and
decrease in significance as you go up in frequency anyway.
Microstrip is not very efficient for routing many of the lines, as you
have to share the surface with all the components, but if given the
option, it is often a good path to take. As Lee Richey pointed out, you
want to qualify your fab vendor that they can fabricate quality surface
traces.=20
As has often been pointed out on this list, it is difficult to make
generalizations and use a set of rules to follow to design each product
the same way since each design has a different set of tradeoffs. This is
why the most important thing for an engineer to learn is the methodology
to approach solving problems, and then access to the tools to make you
more efficient when optimizing the design of your product.=20
The online lectures posted on www.BeTheSignal.com empower engineers with
the techniques to help you make your own decisions about your own
designs, and move you up the learning curve to build your signal
integrity career.=20
***************************************
Eric Bogatin
Bogatin Enterprises
OnLine Lectures on Signal Integrity
26235 w 110th terr
Olathe, KS 66061
v:913-393-1305
cell: 913-424-4333
f:913-393-0929
e:eric@xxxxxxxxxxxxxxx
www.BeTheSignal.com <http://www.BogEnt.com>=20
Signal Integrity- Simplified
published by Prentice Hall
*****************************************
Msg: #1 in digest
Subject: [SI-LIST] Re: Microstrip/Stripline
Date: Tue, 13 Dec 2005 10:41:59 -0800
From: "Loyer, Jeff" <jeff.loyer@xxxxxxxxx>
As someone stated, there are any number of topologies for microstrip
that can be made to be more lossy than stripline, and vice-versa. Using
a 2-D solver, I looked for trends and found that there wasn't any. The
very slight trend I saw was so weak that it reversed itself, depending
on whether I was looking at single-ended or differential signals. And
it was completely overwhelmed by stronger factors, such as loss tangent,
etc.
Contrary to what others have said, I don't remember reading anything
definite reason why one should be more or less lossy than the other, and
that's what I found in my study (though I too have heard lots of
theories otherwise).
Disclaimer:
The content of this message is my personal opinion only and although I
am an employee of Intel, the statements I make here in no way represent
Intel's position on the issue, nor am I authorized to speak on behalf of
Intel on this matter.=3D20
Jeff Loyer
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