[SI-LIST] Re: Microstrip Inductance (Old Wine in New Bottle)
- From: "Dr. Sainath Nimmagadda" <intrinsi@xxxxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Thu, 31 Jul 2003 11:37:48 -0700 (PDT)
I understand, field theory is not the native language to many HSDD engineers.
So, speaking their language may help clear the smoke.
Impedance Management is the essence of SI. So, what we've been discussing in
this inductance thread is the central theme of SI.
Let us consider my 'tiles analogy' one more time. We know trace tile T and
reference tile R (located below T) combination provides max capacitance. Also,
any other combination of T and any other single reference tile(to the left or
right of R) yields a lower value of capacitance.
Characteristic impedance of microstrip: Zo = sqrt(L/C)
Right under the trace where C is max, I don't get how min L will help balance
the (L/C) ratio and sustain the virtually constant Zo.
Thanks in advance,
Sainath
"Dr. Sainath Nimmagadda" <intrinsi@xxxxxxxxx> wrote:
Probably the high-frequency current distribution on the trace itself, which
thus far not entered the discussion, holds key to the dilemma. It should have
current minimum at the center of trace and maximum values at the edges.
Sainath
"Dr. Sainath Nimmagadda" wrote:
Novices and experts,
First, my thanks to Dr. Johnson for seconding my conjucture that there is a
distribution of inductance. In fact, that is how/where I started this thread.
What kind of distribution ?, least inductance or otherwise, is a matter of
follow up. Also, I am glad that Dr. Johnson supported my view that " the
"distribution of least inductance" includes the current flowing at positions
remote from the trace."
Discussion turned off momentarily-
I couldn't access my gigabit@xxxxxxxxxx mail since last Friday because mail
server was down or some such thing. So, this is an old thread with a new email
address. Those numerous readers who sent private emails encouraging this
thread, I appreciate your support, please note my new address
intrinsi@xxxxxxxxx . I checked out the list archives periodically but didn't
see anything new on this thread.
I was expecting to get a response to "What was the original source for the
concept and illustration of Fig. 5.2(high-frequency return-current path)in
Black Magic book?" but didn't. If any of you have any clue on source reference,
please let me know.
Back to the discussion-
I'm surprised that the discussion side-stepped from 'stored energy' (which is
appropriate for inductance) to 'power dissipation' (which is a resistance
property). It looks to me that we are simply trying to extrapolate what we know
about (current flow in) simple resistance to what we possibly don't know about
the more evolved and subtle inductance.
Please allow me to modify (for a better mental picture) Dr. Johnson's ribbon
cable analogy of the reference plane. Let us consider the reference plane as
comprised of a number of tiles, each identical in geometry with our trace. We
keep one reference tile, R, directly under the trace tile, T.
We would like, in a "most--of-the-current" sense, the current flowing out in T
to return back through R. For the time being, other reference tiles are just
"sitting in position" and watching the game. Later, when they play T as a team,
they will reduce the flux contribution due to reference plane (i.e., lower
inductance). Bad game! But, that doesn't affect the focus of our reasoning.
Similar is the contribution from mutuals.
According to the popular screw rule, flux due to currents in T and R (flowing
in opposite directions) add up and the resulting flux concentration (per unit
area sense) will be maximum right under the trace. This leads me to believe
that inductance is maximum there. We know that as we move away from T, along an
imaginary line between T and R,
the flux falls off inversely(1/r). So, remote from T, while still the flux due
to T and R currents keep adding up, the resulting flux concentration (per unit
area sense) gets smaller and smaller. Thus, contributing to lower and lower
inductance as we move away from T.
If the above makes sense, there is a distribution of inductance which is
maximum right under T (where current is maximum) and falls off toward those
edges, away from trace, of reference plane (where the current goes to minimum).
Current and stored energy distributions, which we already know, show a similar
behavior.
Dr. Johnson has already subscribed to possibility of least inductance away from
the trace. Question is how are you guys able to find least inductance right
under the trace where the fields are roaring. Please do tell me what I'm not
getting right.
Sainath
===============================================================
[SI-LIST] Re: si-list Digest V3 #194
---------------------------------
To: "Si-List@xxxxxxxxxxxxx"
Subject: [SI-LIST] Re: si-list Digest V3 #194
From: "Dr. Howard Johnson"
Date: Thu, 24 Jul 2003 11:30:18 -0700
---------------------------------
Dear Sainath,Let's work for a minute on your concept of the "path ofleast
inductance".I think a better wording here would be the "distribution ofleast
inductance".
Imagine you have a long, straight pcb trace carrying acertain amount of signal
current.Underneath that trace I want you to construct not a plane,but an array
of wires (kind like a ribbon cable). Place thewires on a very fine spacing so
that (in the limit) theyapproximate a plane, but keep them as individual wires.
You will findthat the particular return wire that generates the leastinductance
is the one directly underneath the trace.
You are indeed correct that the "distribution of leastinductance" includes the
current flowing at positions remotefrom the trace.
Suppose now you connect individual current sources to theindividual resistors
so you can adjust the current separtelyin each. I claim that, of all possible
distributions ofcurrent adding up to 1 mA, the particular distribution "A"is
the one that minimizes the total dissipated power.
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