[SI-LIST] Memory Signal Integrity
- From: Kenny Frohlich <kenny_frohlich@xxxxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Wed, 20 Sep 2006 21:12:56 -0700 (PDT)
Hi Expert,
I have a question on memory signal integrity:
For memory write cycle, both data and clock signals are probed at the memory
device (SDRAM).
For memory read cycle, data signal is probed at the CPU (memory controller).
But where should I probe the clock signal - at the CPU (source) or at the
memory device (destination)? The clock signal is much cleaner at the memory
device.
Thanks,
Kenny
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