[SI-LIST] Memory CAS Latency (CL2 vs CL3)

  • From: Kenny Frohlich <kenny_frohlich@xxxxxxxxx>
  • To: si-list@xxxxxxxxxxxxx
  • Date: Wed, 22 Aug 2007 23:18:43 -0700 (PDT)

When CAS latency is said to be CL2, does it mean CAS# line will assert for 2 
clock cycles?.  Likewise, CAS# line will assert for 3 clock cycles if CL3?
   
  Thanks you,
  Kenny
   
       
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