[SI-LIST] Re: Maximum trace length of PCIE 3.0 REFCLK in addin card
- From: "Peter" <yonghui.sky@xxxxxxxxx>
- To: <malli.1729@xxxxxxxxx>, <bowden.ivor@xxxxxxxxx>
- Date: Sun, 18 May 2014 11:17:40 +0800
This is not hard requirement, but recommendation, since many aspects have
effects on SI.
CEM recommend:
The propagation delay for an add-in card data trace from the edge finger to
the Receiver/Transmitter must not exceed 750 ps. It is defined by delay, not
absolute length.
Peter
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On
Behalf Of Mallikarjun K
Sent: Saturday, May 17, 2014 11:04 AM
To: bowden.ivor@xxxxxxxxx
Cc: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: Maximum trace length of PCIE 3.0 REFCLK in addin card
I know CEM and base specifications...can you give more details on Card
Module Specifications...
On Sat, May 17, 2014 at 7:59 AM, Ivor Bowden <bowden.ivor@xxxxxxxxx> wrote:
> Hi Mallikarjun,
>
> If you are designing a PCIE 3.0 Card Module, you should
> follow all the design rules in the PCIE 3.0 Card Module
> specification, else you risk interoperability failures. If
> you are PSIG member, you may download PCIE 3.0 Card Module
> specification, else you may purchase it. PSIG url is
> http://www.pcisig.com/
>
> Regards, Ivor
>
> On 5/16/2014 7:03 PM, Mallikarjun K wrote:
> > I don't require exact answer. Any help for knowing that....Any
> documents....
> > We are seeing few issues in captured REFCLK waveform. Rising of REFCLK-
> is
> > not monotonic. The difference between previous design to present one is
> > Length of REFCLK....
> >
> > Mother boards and Add-in cards were manufactured by different
> > manufacturers.Then How total length will be matched to 14".
> >
> > On Thu, May 15, 2014 at 8:15 PM, Cotton, Chris <Chris.Cotton@xxxxxxxxxxx
> >wrote:
> >
> >> Motherboard designers will expect Add-in card to meet PCI Spec, so I
> would
> >> ensure that your add-in card follows PCI-SIG.
> >>
> >> -----Original Message-----
> >> From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx
> ]
> >> On Behalf Of Mallikarjun K
> >> Sent: Thursday, May 15, 2014 9:52 AM
> >> To: si-list@xxxxxxxxxxxxx
> >> Subject: [SI-LIST] Maximum trace length of PCIE 3.0 REFCLK in addin
card
> >>
> >> Hi,
> >> I want to know is there any maximum trace length routed in Add-in card
> for
> >> PCIE_REFCLK (*PCI express 3.0*)signal.
> >>
> >> I have seen few references.
> >>
> >> 1. http://www.ti.com/lit/ug/sllu149c/sllu149c.pdf says
> >>
> >> "The PCI-Express drivers and receivers are designed to operate with
> >> adequate bit error rate margins over a 20-inch maximum length signal
> pair
> >> routed through FR4 circuit board material.
> >>
> >> The number of vias must be minimized. Each signal trace via reduces the
> >> maximum trace length by approximately 2 inches. For example: if 6 vias
> are
> >> needed, the maximum trace length is 8 inches"
> >>
> >> 2.
> >>
> >>
>
http://www.pcisig.com/developers/main/training_materials/get_document?doc_id
uf2647963b4f382370524e5faed8e3c3ee050e7
> >> PCI Express��������?3.0 PHY Electrical Layer Requirements Sheet 9
> >>
> >> Says Addin card Main trace should be 3"
> >>
> >> 3.
> >>
>
http://www.slideshare.net/Agilent/ads-workshop-on-pci-expressr-presentation
> >> ADS Workshop on PCIexpress in Slide 9
> >> Maximum recommended trace length on add-in card is < 3.5".
> >>
> >>
> >> Is there specific limit on the add-in card PCIE REFCLK trace length.
> >>
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