[SI-LIST] Re: Maximum trace length of 6.25Gbps SerDes
- From: Heyfitch <heyfitch@xxxxxxxx>
- To: steve weir <weirsi@xxxxxxxxxx>, "si-list@xxxxxxxxxxxxx" <si-list@xxxxxxxxxxxxx>
- Date: Tue, 11 May 2010 22:50:45 -0500
This original question brings to mind an old Russian joke about a famous
soviet revolutionary (1917) hero V.I. and his adjutant P. It goes like this:
V.I. and P. are flying a plane. V.I. is at the controls - intently staring
into the fog - and P. is behind him.
V.I.: - P., the device?!
P.: - Five!
V.I.: - What is "five"?
P.: - and what is "the device"?
I am not sure how well my translation comes across, but I could not resist.
- Vadim
On Tue, May 11, 2010 at 9:19 PM, steve weir <weirsi@xxxxxxxxxx> wrote:
> I give you credit for sheer chutzpah.
>
> Mashook Ahamed Usman wrote:
> > Dear Experts,
> > Good day!
> > Currently I am assigned to collect the routing tips for 6.25Gbps serdes
> interface. Since we are not doing the simulation at the current draft we
> would like to go with a rule of thumb if possible.
> > The trace has to start from the linecard, run through the backplane and
> terminate in the switch card which is an usual scenario.
> > Considering a 100 ohm controlled impedance in FR4 material, what would be
> the maximum length a 6.25Gbps serdes can travel from line card to the switch
> card. The pre emphasis and equilalizer is in build in the chipset no need to
> put outside.
> >
> > Thank you very much for your time.
> >
> > M Usman
> >
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