[SI-LIST] Re: METASTABILITY
- From: "ariazi" <ariazi@xxxxxxxxxxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Mon, 9 Jan 2006 11:27:56 -0800
>In many cases, metastability in flip-flops can be avoided by ensuring=20
>that the data and control inputs are held constant for specified=20
>periods before and after the clock pulse, called the setup time (tsu)=20
>and the hold time (th) respectively. These times are specified in the=20
>data sheet for the device, and are typically between a few nanoseconds=20
>and a few hundred nanoseconds for modern devices.
It seems that the "nanoseconds" in above paragraphs should have been
"picoseconds".
As an example, for a DDR2 SDRAM device such as Micron MT47H64M8 the DQ =
input
setup time
tDS and input hold time tDH relative to DQS are 300ps and 175ps
respectively.
Regards,
Abe Riazi
ServerWorks
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