[SI-LIST] Looking for SI job
- From: mahamud khandokar <mahamud_khandokar@xxxxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Thu, 12 Feb 2004 16:07:04 -0800 (PST)
Hi,
I am Mahamud Khandokar (Misty). I am looking for SI job or related job in Bay
Area. please let me know If there is any position is open.
I have over two years of combined experience of working in a fast paced silicon
valley company in the capacity of Signal Integrity Engineer. Specifically, I
have solid experience in PCB Troubleshooting techniques and use of
sophisticated simulation/modeling tools and test equipment such as
state-of-the-art time and frequency domain measurement instruments to analyze
and characterize high performance 1 ? 10 Gb/s printed circuit boards and
backplane interconnects. Good communication skills with ability to work
effectively in both independent and team environments.
I really appreciate your time. I am attaching my resume. I will look forward to
here from you.
Mahamud(misty)
--------------------------------------------------------------------------------------------------------------------------------
RESUME
Mahamud Khandokar (Misty)
8185 Arroyo Dr. #4 925-600-0143 (H)
925-998-7872(C)
Pleasanton, CA 94588
mahamud_khandokar@xxxxxxxxx
SUMMARY OF QUALIFICATIONS
Two years Signal Integrity experience including use of sophisticated
simulation/modeling tools and state-of-the-art time and frequency domain
measurement instruments to analyze and characterize high performance 1 ? 10
Gb/s printed circuit boards and backplane interconnects. Good communication
skills with ability to work effectively in both independent and team
environments.
TECHNICAL/COMPUTER SKILLS
Operating Systems: MS DOS, MS Windows, UNIX, MS Office Suite (Word,
Excel, etc.)
Languages: C++, Pascal, Verilog, Matlab, HP VEE, Assembly
Simulation Tools: Ansoft HFSS FEM, Optimetrics, HSPICE, LC FDTD,
Apsim MOM,
TDA Systems IConnect® data acquisition
Test Equipment: Vector Network Analyzer (2 and 4 port S-parameters
to 20 GHz) Communications Signal Analyzer (TDR, TDT)
12.5 GHz Pulse Pattern Generator for generating eye-diagrams
PROFESSIONAL EXPERIENCE
Sanmina-SCI, San Jose, CA
2002 ? 2003
Signal Integrity Engineer, Backplane Design Technology and Signal Integrity
Design Group
· Analyzed multi-layer PCB and backplane via structures using Apsim
(MOM) and Ansoft HFSS (FEM) tools.
· Generated circuit models from S-parameters.
· Helped develop an HP VEE based RF relay controller and associated 64
term error correction algorithm to allow a 2-port Vector Network Analyzer to
make 4-port differential and mixed mode S-parameter measurements to 20 GHz.
· Helped develop an HP VEE driven data acquisition program that used a
sophisticated communications oscilloscope and pulse pattern generator to
characterized the losses and deterministic jitter (inter-symbol interference)
induced by high performance PCB and backplane interconnects.
· Characterized differential and mixed mode S-parameters and frequency
domain crosstalk of high performance reference backplanes to 20 GHz.
· Used sophisticated communications analyzer to measure jitter and
time-domain crosstalk of high performance reference backplanes.
· Measured characteristic impedance of single-ended and differential
PCB and backplane traces.
· Measured propagation delay of PCB and backplane traces.
Sanmina-SCI, San Jose, CA
Summer- 2001
Intern, EMC/Signal Integrity Design Group
Measurement and statistical analysis of characteristic impedance and velocity
of propagation of 50 impedance control coupons.
EDUCATION
Master of Science in Electrical Engineering, (expected Fall 2005)
San Jose State University
Santa Clara University, Fall 2003
Signal Integrity Design (one semester graduate level course)
Bachelor of Science, Spring 2002
San Francisco State University
Major: Electrical Engineering, GPA: 3.32/4.0
Bachelor of Science, May 1997
University of Dhaka, Dhaka, Bangladesh
Major: Applied Physics & Electronics, Minor: Physics and chemistry
RELATED ACADEMIC COURSE WORK
Graduate Level Courses: Analog Integrated Circuits, Linear System Theory
(currently taking).
Electromagnetic Wave, Electromagnetic Waves II, Electromagnetic Compatibility,
Communication System, Digital System Design, Design with Microprocessors,
System Analysis, Computer Programming with C++, Senior Project (Microwave Band
Pass Filter on a PCB).
ACTIVITIES
Secretary of IEEE at SFSU from Fall 2001.
PATENTS PENDING
Co-developer of the Opti-Via? via optimization process (Sanmina-SCI)
ACADEMIC HONORS
· IEEE EMC Scholarship, San Francisco State University, May 2001.
· Distinctions (letters) from Board of Higher Secondary School
Examination (American High School equivalent multi-city combined final test) in
Mathematics, Physics, Biology, and Chemistry, and Statistics.
· Distinctions (letters) in Board of Secondary School Certificate (10th
grade multi-city combined final test) in Mathematics, Biology, Physics,
Chemistry, and Geography.
REFERENCES
Available upon request
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