[SI-LIST] Looking for FPGA on-die PDN Frequency Characteristic Measurement Test Cases

  • From: Cosmin Iorga <ci249534@xxxxxxxxx>
  • To: "si-list@xxxxxxxxxxxxx" <si-list@xxxxxxxxxxxxx>
  • Date: Mon, 31 Oct 2011 22:57:46 -0700 (PDT)

Hello Everyone,
 
I am looking for potential FPGA test cases where I can further study/test a 
technique for measuring on-die the frequency characteristic (frequency profile) 
of the power distribution impedance of the FPGA. I have developed and tested 
this technique so far on Xilinx FPGAs and it works well but I am interested to 
see how it works in different applications using various other types of FPGAs. 
If you want to participate in this study please let me know. 
 
What you get is: free multiple on-die measurements of power distribution 
profile of your FPGA project that you can use to verify/adjust decoupling 
capacitors values, troubleshoot PDN issues, or figure out resonance peaks where 
you do not want the FPGA clock to operate. 
 
What I get is: further study and validation of this measurement technique.
 
There should be no major impact to your project and the test should be fast. 
This technique uses a measurement block built only with common logic blocks 
existing in any FPGA and which then is connected through a serial interface to 
a notebook computer. A software application runs on the computer and measures 
the impedance profile of the power distribution as seen by the on-die circuits 
inside the FPGA. After this measurement, the FPGA can be reprogrammed to the 
original state/functions. 
If you are interested or have any questions please contact me at this email 
address or at  
Best Regards,
Cosmin
ã??
Cosmin Iorga, Ph.D.
Founder,
NoiseCoupling.comhttp://www.noisecoupling.comcosmin.iorga@xxxxxxxxxxxxxxxxx
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