[SI-LIST] Re: Log Function development in VHDL in Asynchronous way
- From: Alan Hilton-Nickel <alan@xxxxxxxxxxxxxxxxx>
- To: zameer_soc@xxxxxxxxx
- Date: Tue, 28 Sep 2004 22:56:52 -0700
Zameer,
While you may get a few responses here, I'm pretty sure you'll have
better luck posting your question to comp.lang.vhdl or comp.lang.verilog.
BTW, people in those newsgroups are less kind to newbies who ask
questions without trying to figure out the answers first, so you also
might want to take a more substantive approach to the problem than just
saying "it's hard, send it to me".
Alan
Mohamemd Zameer wrote:
>Hello friends,
>
>I have developed Log function using FSM and Datapath which takes less area
>with one multiplier and one adder/Subtractor in my datapath.
>
>I have the following questions.
>
>1. The way I developed is using FSM and Datapath which is nothing but
>synchronous way since it used clock pulse in FSM and Registers in Datapath.
>
>2. Now I want to developed the same in asynchronous way. Can any one guide me
>how to start approach for the same log function in asynchronous way without
>using clock pulse. I feel it becomes complicated. But still I want to do it.
>
>Also if any one developed the same log function in asynchronous way, please
>sent it to me.
>
>Thanks in advance
>
>cheers,
>Zameer
>
>
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