[SI-LIST] Lee Ritchey's Signal Integrity and High Speed System Design Class in Burlingame
- From: "Lee Ritchey" <leeritchey@xxxxxxxxxxxxx>
- To: <ibis@xxxxxxx>, <ibis-users@xxxxxxx>, <si-list@xxxxxxxxxxxxx>
- Date: Mon, 3 Oct 2011 09:37:24 -0700
There are still a few seats available for the excellent class in high speed
design. It is the only public offering of this class in 2011.
******************HIGH SPEED PCB AND SYSTEM DESIGN COURSE SAN FRANCISCO
AIRPORT (BURLINGAME) CALIFORNIA
Event: Two-day High Speed PCB and System Design Course
Date: October 19-20, 2011-REGISTRATION DEADLINE: OCTOBER 10, 2011!
Location: Hilton Garden Inn
765 Airport Boulevard
Burlingame, CA 94010
Course Description:
This two-day training session on the design of high-speed PCBs and their
associated systems is the premier course offered by Speeding Edge and has
been taught to more than 8,000 engineering professionals worldwide.
Conducted by one of the world's leading experts on high-speed PCB and
computer system design and Speeding Edge President, Lee Ritchey, this very
practical course is thorough and comprehensive. It covers all the physics
involved in high-speed design, explaining the science behind each one of the
principles, their role in high-speed systems and how to properly manage the
design process to account for them. This course will give the engineering
professional the fundamental knowledge necessary to make the most efficient
design rule set; organize the design process to efficiently execute the
design, select the appropriate PCB materials and choose the toolsets that
will best suit the design process. This course is especially relevant to IC
designers as device speeds outstrip the traditional packages and application
notes. This course has been designed to be very hands-on such that students
can immediately apply the knowledge gained from the class to their current
design environments.
As speeds and complexities of ICs have grown, their power requirements have
changed dramatically. The practice of "sprinkling" capacitors around a PCB
has proven deficient with these ICs, leading to many design failures related
to power delivery. In the fact, the majority of design failures, both
functional and EMI, are traceable to power delivery problems. For this
reason, a majority of this course focuses on how to design robust power
delivery systems, a topic that is often ignored by manufacturers in their
application notes.
Note: A Special Section has been added to this course to deal with the
multi-gigabit per second differential signaling being used in virtually all
new products.
What's Included:
*3-ring binder containing all presentation slides used in
class
*Signed course certificate
*Copy of Right the First Time Volume 1 Book on CD-ROM
*Continental breakfast and lunch and snacks both days
Cost: $1,210 per student. SPECIAL OFFER: REGISTER FOR THE COURSE AND BUY
A COPY OF VOLUME 2 OF OUR RIGHT THE FIRST TIME BOOK AND RECEIVE A 50%
DISCOUNT ON THE BOOK PRICE FOR A TOTAL COST OF $1,258.00 PER STUDENT. To
register for this course, please visit our website at www.speedingedge.com
For more information regarding this course, please contact speeding edge at
707-568-3983 or send an e-mail to kjspeedingegde@xxxxxxx
Accommodations are not included in the course fee. For room reservations,
please contact the hotel directly at 650-347-7800. Identify yourself as
being part of the Speeding Edge Course event.
Additional Information Presented As Part of This Course:
Isola will provide an overview on available laminate and prepreg materials
including information on how laminate and prepreg are manufactured.
Information on glass fabric building blocks that are available including
explanations of nomenclature for glass fabric and why certain glass fabrics
are used for various designs will be discussed. Isola will discuss the
different copper types available and the effects on signal integrity; the
impact of core and prepreg material selection; and what designers should be
looking for during the evaluation and selection process. Electrical Test
methods for core materials will also be discussed to show differences in
test methods and material testing that could affect high speed digital
designs.
Polar Instruments' Si8000 loss less field solver is the PCB fabricators'
defacto tool of choice for controlled impendence trace design. To predict
traces' S-parameters, RLGC components, copper and dielectric losses and
more, the engineers' tool of choice is the frequency-dependent Si9000 field
solver. Seamlessly interfacing to either of these are the Polar Speedstack
and Speedflex HDI stackup design tools. Working from suppliers' materials
libraries, these systems make easy work of stack designs, including
controlled impedance traces and signal integrity parameters for the signal
layers. As a follow on to Lee Ritchey's stackup and board design
presentation, Ken Taylor of Polar Instruments will give a short
demonstration using SpeedStack and Si9000 to design and adjust a stack,
following Lee Ritchey's guidelines. Each class attendee will take away a
full functioning copy of the Polar software tools together with an Isola
materials library to enable them to easily follow through on Lee Ritchey's
presentation and guidelines. Also: Special Offer from Polar Instruments:
Purchase a Polar Si9000e Lossy Line Field Solver between August 16, 2011 and
December 31,2011 and Polar will refund the entire class price w/ book $1,258
for your attendance at the Speeding Edge Two-Day High Speed PCB and System
Design Class. For full offer details please go to the Polar Instruments
website at http://www.polarinstruments.com/news/trade.html#SpeedingEdge.
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