Hi Giovanni ! No, I have not any compares with or without solder mask but all the time when I get from fabricators recommended stack up it deferent from Allegro calculation (10% and more!). When I ask why? , they answer me :that because in Allegro not use soldermask but all fabricators use POLAR. So I think that It must be included and now I learn how to do this. Of course all factors you talk about very important. Uri -----Original Message----- From: Guasti Giovanni [mailto:Giovanni.Guasti@xxxxxxxxxx] Sent: Thursday, February 19, 2004 12:42 PM To: 'urich@xxxxxxxxxx'; 'si-list@xxxxxxxxxxxxx' Subject: R: [SI-LIST] Layout Cross Section Hi Uri, every time I measure the impedance I find that it's far from being <<right>> the same of that one I had previously simulated. I think we should recognize the most important factors that effect our simulation. Maybe soldermask is really important. I tryed a simple simulation (I attached it at the end of this mail) and it seem that Z0 changes of about 4 ohm (7% of nominal value). Now I'm curious to compare this result to those linked to other variables as: 1) PCB fabricators manufacturing techniques 2) press temperature and pressure 3) the real er of my PCB: FR4 is a glass resin "mix" and er is a mix too 4) precision of the measurement (!) Do you have some data about? How much does er change in the cases of temperature and pressure variation, or in the case of poor or rich of resin FR4? Please, could you mail the difference between a Z0 calculated by Polar, in the two cases: whith and without soldermask? Thanks, Giovanni # ------------------------------------------------------------------------ # Conductor units are centimeters (2.540/inch) # ------------------------------------------------------------------------ CONVERGENCE 0.00000001 MODE METRIC CONFIG yes_solder e: 1 rho: 0.0000017241 tan: 0.0180 DIELECTRIC e: 4.5 HORIZ_PLANE y: 0.0170 0.0210 CONDUCTOR 1 RECTANGLE x: -0.01000 0.01000 y: 0.0170 0.0190 DIELECTRIC e: 4.4 HORIZ_PLANE y: 0.0020 0.0170 GROUND HORIZ_PLANE y: 0.0000 0.0020 ; CONFIG no_solder e: 1 rho: 0.0000017241 tan: 0.0180 CONDUCTOR 1 RECTANGLE x: -0.01000 0.01000 y: 0.0170 0.0190 DIELECTRIC e: 4.4 HORIZ_PLANE y: 0.0020 0.0170 GROUND HORIZ_PLANE y: 0.0000 0.0020 ; XFX V6.7.1 Report 19 Feb 10:58 2004 Setup File = sigroup.xfx Configuration Name: yes_solder Conductors: 1 Conductor index: 0 name: $$GND$$ Conductor index: 1 name: 1 i j Lij Cij Ze Zo Se So Fwdx Rvsx from to (nh/cm) (pf/cm) (ohms) (ohms) (ns/m) (ns/m) (s/s) (v/v) -------------------------------------------------------------------------- 1 1 3.462 1.150 54.87 - 6.31 - - - : LOSS MATRICES i j Rsij Gij Rdcij Gdcij from to (ohm-nsec^.5) (mS-ns) (ohms) (mS) PER CM -------------------------------------------------------------------------- 1 1 0.12528 0.020700 0.04310 0.00000 ; Configuration Name: no_solder Conductors: 1 Conductor index: 0 name: $$GND$$ Conductor index: 1 name: 1 i j Lij Cij Ze Zo Se So Fwdx Rvsx from to (nh/cm) (pf/cm) (ohms) (ohms) (ns/m) (ns/m) (s/s) (v/v) -------------------------------------------------------------------------- 1 1 3.455 1.006 58.59 - 5.90 - - - : LOSS MATRICES i j Rsij Gij Rdcij Gdcij from to (ohm-nsec^.5) (mS-ns) (ohms) (mS) PER CM -------------------------------------------------------------------------- 1 1 0.13389 0.018115 0.04310 0.00000 ; -----Messaggio originale----- Da: Uri Chaplianka [mailto:urich@xxxxxxxxxx] Inviato: mercoledì 18 febbraio 2004 17.53 A: 'si-list@xxxxxxxxxxxxx' Oggetto: [SI-LIST] Layout Cross Section Hi Gurus, I see that in Cadence Allegro exist big mistake but nobody worry about it. I talk about Layout Cross Section. I see that external layers( TOP and BOTTOM) have only 1 options of cover - AIR. But usually 90% of boards use SOLDERMASK and have other Er. I can change layer AIR in Subclasses/Etch to other material like FR-4 (no SOLDERMASK ) but not exist possibility to enter Er and Lost Tangent. So, impedance that you calculate will be not right ! Professional tools like Polar always use all possible covers and have another calculation result. I think it MUST be added to next release of allegro. Thanks and best regards, Uri Chaplin Senior PCB Designer BATM Advanced Communications Ltd. ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List technical documents are available at: http://www.si-list.org List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List technical documents are available at: http://www.si-list.org List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu