Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Hi All, I have a problem. Given below is a topology that i have.=20 =20 =20 I have a bidirectional bus which connects a FPGA to the CHIP. The distance between them is 2 inches. Now to probe this bus, i have the signals coming out to the right at a distance of about 6 inches. Note that i am using active probes to probe this interface and there are NO buffers on the line between the chip and LA probes. Now the problem is that when the LA is plugged in I find that the strength of the signals driven by the chip comes down from 3.3V to 2V. Without the LA plugged, the signal strength remains intact. Could anyone help me in understanding this? If a solution is possible to get around this, it will be great. =20 Regards, Anand =20 =20 -- Binary/unsupported file stripped by Ecartis -- -- Type: image/jpeg -- File: Outlook.jpg -- Desc: Outlook.jpg ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List technical documents are available at: http://www.si-list.net List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu