[SI-LIST] Re: Job opening at Altera

  • From: "Lyndell Asbenson" <Lyndell.Asbenson@xxxxxxxxxxx>
  • To: <kchandr2@xxxxxxxxx>, <si-list@xxxxxxxxxxxxx>
  • Date: Wed, 4 Nov 2015 11:56:19 -0800

Altera, at what location?

-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On
Behalf Of Karthik Chandrasekar
Sent: Wednesday, November 4, 2015 11:53 AM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Job opening at Altera

Hi All
I have a full-time job opening in my group for a role focused on Circuit
Simulation + CAD (Please see description below). Please send resume directly to
me if interested in a separate e-mail addressed only to me.
This is not a SI/PI role but I thought I would reach out to see if there are
folks who would be interested in this role in this distribution list.

Regards
Karthik


As a Staff CAD Engineer, you will be pioneering/developing and supporting our
next generation Circuit Simulation Flows. You will also drive and come up with
productive methodologies for our Analog, Custom Digital and mixed signal design
teams. Your specific responsibilities will include but are not limited to the
following:
• Developing, and Leading next generation Circuit Simulation flows,
experience on benchmarking spice tools for accuracy and performance.
• Experience in debugging critical SPICE related issues like Monte Carlo,
Aging degradation • Driving flow validation methodology and deployment for
quality and efficiency • Interfacing with internal customers and vendors
effectively • Engaging in strategic roadmap development with key EDA vendors
and other design stakeholders.

The successful candidate's minimum qualifications will include the
following:
• MS in Electrical Engineering or equivalent with a minimum of 5 years of
experience • Strong Expertise with major circuit simulation tools and
deployment experience to broader design groups • Familiarity with MOS Aging,
Co-simulation environment solutions • Familiarity with the following tools:
Synopsys Finesim, Hspice, and Customsim, Cadence Spectre (APS,RF) •
Experience with custom design cockpits, such as Cadence ADE or Synopsys SAE •
Experience with variability analysis and optimization tools such as Solido and
MunEDA • Experience with custom circuit regression environments • Good
experience in UNIX and Scripting Languages such as Python, TCL and perl •
Demonstrate strong written and verbal communications

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