[SI-LIST] Job Opening - Signal Integrity Design Engineer - Juniper Networks - Sunnyvale, CA
- From: "Juniper Networks" <juniper@xxxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Fri, 9 Aug 2013 11:52:49 -0700
Signal Integrity Design Engineer
ABOUT JUNIPER NETWORKS
Juniper Networks is in the business of network innovation. From devices to
data centers, from consumers to cloud providers, Juniper Networks delivers
the software, silicon and systems that transform the experience and
economics of networking. Our products and technology run the worlds
largest and most demanding networks today, enabling service providers,
enterprises, and governments to create value and accelerate business
success. Everyday our 9,000+ colleagues come together across 46 countries
to realize our company vision Connect Everything, Empower Everyone. We
are innovating in ways that empower our customers, our partners and
ultimately, everyone, in a connected world. These customers include the
top 130 global service providers, 96 of the Fortune 100 and hundreds of
public sector organizations.
WHERE WILL YOU DO YOUR BEST WORK?
Wherever you are in the world, whether its downtown Sunnyvale or London,
Westford or Bangalore, Juniper is a place that was founded on disruptive
thinking where colleague innovation is not only valued, but expected. We
believe that the great task of delivering a new network for the next
decade is delivered through the creativity and commitment of our people.
The Juniper Way is the commitment to all our colleagues that the culture
and company inspire their best worktheir lifes work. At Juniper we
believe this is more than a job - its an opportunity to help change the
world...
Key Responsibilities:
Contribute in a team oriented centralized SI organization performing
system signal integrity design with exposure to new and different cutting
edge technologies.
Perform analysis and design and understand tradeoffs in designing
interconnect solutions ranging from chip to chip, board to board,
backplane and chassis to chassis interconnect.
Perform channel margin analysis to provide design tradeoffs amongst
package, board, connector. Develop serdes channel simulation models and
correlate to test structures.
Correlate Tx and Rx serdes simulation models with measurements and work
with serdes vendors to improve model accuracy.
Perform PCB timing analysis, work with board engineers and layout
designers to implement all SI rules, develop layout/SI checklists.
Document SI rules. Perform SI DVT measurements on boards and correlate
simulations with DVT measurements.
Document SI DVT measurements and correlation to simulations.
Good team player able to work with other SI engineers and managers across
geography in a matrix organization. Leverage designs from other SI
engineers and share in learning of new designs with SI team.
Capable of presenting new work/concepts/analysis to SI team forums.
Provide technical assessment of projects to SI management team.
For immediate considerations, please send your resume to:
juniper@xxxxxxxx (This address routes directly to the Juniper SI Team.)
www.SignalIntegrityJobs.com
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