Hi Arun,
A good learning software tool for understanding the relation between target
impedance, noise generation, and noise coupling in integrated circuits is
ChipQuake Power Integrity Explorer. It is not free but it is inexpensive (it
costs $99).
Cosmin
--------------------------------------------
On Thu, 7/6/17, Arun Kumar K <ArunKumar.K@xxxxxxxxxxxxxxxxxxx> wrote:
Subject: [SI-LIST] Information needed on PDN Analysis
To: "si-list" <si-list@xxxxxxxxxxxxx>
Cc: "arunka97@xxxxxxxxx" <arunka97@xxxxxxxxx>
Date: Thursday, July 6, 2017, 3:51 AM
Hi All,
I am doing PDN analysis with simulation
tool.
I am confused with relation between
Target impedence and noise voltage.
Taget impedence will be calculated
based on -> Target impedence=Voltage tolerence/50% Load
current
That means ->Target impedence=
Allowed ripple voltage/Transient current
With the same assumption, I am doing
the simulation by injecting the 50% load current into the
Power plane in few ports(sinkpoints)
Each sink points will draw different
amount of current.
After doing the simulation based on the
above assumption, I am getting a noise voltage plot with
different frequency( Noise voltage vs Frequency +10MHz
increment)
How I have to relate noise into the
target impdence?
Thanks & Regards
Arunkumar K
L&T Technology Services Ltd
www.LntTechservices.com<http://www.lnttechservices.com/>
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