[SI-LIST] Re: Inductance of Via
- From: "Chan, Michael" <Michael.Chan@xxxxxxxxxx>
- To: "'si-list@xxxxxxxxxxxxx'" <si-list@xxxxxxxxxxxxx>
- Date: Mon, 11 Jun 2001 11:45:16 -0500
That is true when you have the partial inductance of the return current
portion of
the via and the mutual inductance between the signal and return via include
in the
entire model ( in this case a matrix ). When Michael Tsuk said is that if
you have
only the partial inductance ( which represent the signal via only ) in your
circuit
simulator then your result will not be right.
-----Original Message-----
From: Neeraj Pendse [mailto:cnepsc@xxxxxxxxxxxxxxx]
Sent: Monday, June 11, 2001 11:16 AM
To: si-list@xxxxxxxxxxxxx
Cc: ytang@xxxxxxxxxxxxxxxxx
Subject: [SI-LIST] Re: Inductance of Via
To Yibing:
I checked up this formula from Dr. Johnson's book - and I feel that it
should
be
L = 5.08 * h * [ln(4h/d) - 1]
If you make this correction, it is the formula for AC inductance (surface
currents only) of a straight, round conductor with diameter d and height h,
all
distance units are inches. I tried simulating several vias in a 3D field
solver, and I realized that at AC, the inductance of a via is the same
whether
it is filled or not. Also that it follows the above formula (with a -1) far
better than the formula in Dr. Johnson's book. (which has a +1). You might
want to try this formula, and check your results with a 3-D field solver/RLC
parameter extractor.
I disagree with Michael's statement that it does not make sense to talk
about
the inductance of the via in isolation. While I agree to the fact that the
entire current "loop" must be considered when you are minimizing the
inductance
- the concept of inductance is not limited to "loops", bet can also be
applied
to discreet pieces of a loop. When all significant mutual inductances are
accounted for, the total inductance of the loop can be easily realized from
the pieces. This is the concept of "partial inductance", and in my opinion
it
is a very powerful method of evaluating interconnects when you want to do a
lumped element analysis.
Regards,
Neeraj.
"Tsuk, Michael" wrote:
> Yibing Tang wrote:
>
> > I use a formula to calculate the inductance of through hole via,
> > L=5.08h[ln(4h/d)+1]
> > However, I find that it is not suitable for small ratio of h to d.
> >From this
> > formula,if decrease the ratio, I could get very lower inductance, even
> > negative.
>
> It makes no sense to talk about the inductance of a via in isolation.
> None at all. Inductance is a quality of a loop of current; without
> knowing where your return path is, you can't get a meaningful value for
> the total inductance.
>
> In any case, it seems that your formula isn't applicable to vias; this
> was discussed back in March. See:
>
> http://www.qsl.net/wb6tpu/si-list/0117.html
>
> > My question is how far I can go to low the inductance.
>
> You have two main choices:
>
> 1. Bring the return path vias closer to the signal via
> 2. Shorten the length of the via
>
> The effect of the diameter is relatively weak.
>
> --
> Michael Tsuk
> Compaq AlphaServer Product Development
> (508) 467-4621
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