[SI-LIST] IBIS Model and how to model PCB Trace & minimize cross talk
- From: Embedded Online <embeddedsystemsonline@xxxxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Sat, 16 Nov 2002 10:55:10 -0800 (PST)
How IBIS models are created ? Are these available from vendors if I have part
number ?
My area is PCB design.
In nutshell I my design is a Mircoprocessor say Pentium connected with a RAM,
ROM, Transceivers etc. on a say Six Layer FR4 board with 1 ground and power
plan.
I have Board thickness, layer thickness, dielectrics and loss tangents values
including rise and fall times.
I want to calculate how much lenght a track should have to minimize Signal
Integrity. Take example of Clock Signal from CPU to Xtal and other ICs.
Now to me PCB track comming from Output pin (clock- from Microprocessor_ can be
modeled as Transmission line (lumped or distributed). And I can take care of
Transmission line Matching etc.
I get confused how to incoporate PCB board Capacitance in that model ?
Also how to minimize cross talk between clock signals and others.
Thanks in advance for help.
regards
Embedded
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