[SI-LIST] IBIS Model Parasitic
- From: "ARiazi" <ARIAZI@xxxxxxxxxxx>
- To: <si-list@xxxxxxxxxxxxx>
- Date: Fri, 26 Dec 2003 09:42:00 -0800
Dear Si-List Members
I wish all of you wonderful holidays and a very happy 2004!
Having worked with IBIS models package and pin parastics, I have noted:
1. Many models include package parasitics (e.g. R_pkg, C_pkg, L_pkg) for the
typ, min and
max corners without specifying the individual Pin parasitic (e.g. R_pin,
C_pin, L_pin). Certain cases
necessitate comparing different packages to select the optimum device (please
see EXAMPLE 1).
2. Some models furnish both the Package and Pin parasitics (illustrated by
EXAMPLE 2) allowing
more accurate simulations.
3. It is frequently desirable to change the lumped parasitics into a distributed
format (EXAMPLE 3) towards achieving higher accuracy.
4. Package parasitics may be also available as a .pkg file; which are readily
converted into TOPSPEC (using: >IBIS2XTK -pkg ) for XTK modeling .
5. The uncoupled single net package models ( lumped or distributed )
offer simplicity and simulation efficiency (as compared to coupled models),
but can prove
unsuitable in certain cases involving fast switching signal.
EXAMPLE 1.
Let us consider a high-speed PCB design which offers a device choice
in either TSOP or BGA package; with model parasitics as:
For TSOP package:
[Package]
| typ min max
R_pkg 0.089 0.061 0.094
L_pkg 5.543nH 4.030nH 6.350nH
C_pkg 0.833pF 0.339pF 1.040pF
|
For FBGA package:
[Package]
| typ min max
R_pkg 68m 48m 86m
L_pkg 2.29nH 1.34nH 3.16nH
C_pkg 505fF 387fF 571fF
|
In this case, it can prove beneficial to evaluate/simulate with each of
these package types to decide which one is the optimum selection for the design.
EXAMPLE 2.
The attachment below shows section of an IBIS model which includes
both Package and individual pin parasitics:
|***************************************************************************
[Component] LV00A_D
[Manufacturer] Texas Instruments, Inc.
[Package]
| typ min max
R_pkg 0.031 0.028 0.034
L_pkg 3.109nH 2.462nH 3.889nH
C_pkg 0.473pF 0.363pF 0.628pF
|
|**************************************************************************
|
[Pin] signal_name model_name R_pin L_pin C_pin
|
1 1A LV00A_IN 0.033 3.854nH 0.622pF
2 1B LV00A_IN 0.032 3.188nH 0.473pF
3 1Y LV00A_OUT 0.028 2.462nH 0.377pF
4 2A LV00A_IN 0.031 2.596nH 0.363pF
5 2B LV00A_IN 0.028 2.521nH 0.372pF
6 2Y LV00A_OUT 0.034 3.250nH 0.476pF
7 GND GND 0.034 3.889nH 0.628pF
Such models which present pin to pin parasitic variations can allow higher
accuracy simulations as compared to those which provide only R_pkg, L_pkg and
C_pkg.
EXAMPLE 3
The lumped format R_pkg, L_pkg, C_Pkg can be converted into a T line model
with characteristic impedance ( Zo) and delay ( TD ) via:
Zo = SQRT( L_pkg/C_pkg)
TD = SQRT(L_pkg * C_pkg)
For instance, when nominal R_pkg=0.192 Ohms, L_pkg = 3.6 nH, C_pkg = 1.59 pF
Then, for SPICE simulations it is possible to create the following T line
representation:
Zo=SQRT(L_pkg/C_PKG) = 47.58 Ohms
TD=SQRT(L_pkg * C_pkg) = 7.57E-11 Sec.
Also, for XTK modeling it is feasible to utilize the pin TOPSPEC feature
(which is preferable over lumped values),
T: PKG_TYP with PKG_TYP defined by:
TOPSPEC PKG_TYP
NEXT 1.0 Z:47.58 S:0.91
SERIES P1 1 TYPE R_PKG
ENDTOPSEPC
LOADSPEC R_PKG
REFF: 0.192
To generate above TOPSPEC required these formulas:
Z =SQRT(L_pkg/C_PKG)
TD=SQRT(L_pkg * C_pkg), and
S=TD/L (in unit of nS/ft) , with the package trace length L set to 1.0 inches.
(In this example, translation of lumped parasitics to the equivalent distribued
representations was shown only for the typ case. Of course, conversion (from
lumped to
distributed) for the min and max corner values are also required for the Slow
and Fast
corner simulations)
The above cases discussed have involved uncoupled package parasitics. As
mentioned
earlier, certain fast edge rate applications can dictate use of the more complex
coupled models.
Kind Regards,
Abe Riazi
ServerWorks
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