[SI-LIST] IBIS Confusion over Component/Package/Pin vs Define Package Model
- From: Russell Dill <Russ.Dill@xxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Tue, 9 Aug 2011 01:42:38 -0700
I'm looking at the Component/Package/Pin RLC values of an IBIS
component (Micron 2Gb DDR2 SDRAM) and the Package Model RLC data. I
realise they won't be identical since they are measuring different
things, but even in the case of banded matrix components with 0
bandwidth (resistance matrix) they are way off.
For example, From the Component/Package/Pin section:
[Pin] signal_name model_name R_pin L_pin C_pin
[...]
L1 BA2 INPUT 293.00m 2.27nH 0.40pF
L2 BA0 INPUT 225.78m 1.80nH 0.31pF
L3 BA1 INPUT 164.66m 1.31nH 0.24pF
And from the define package model section:
[Model Data]
[Inductance Matrix] Sparse_Matrix
[...]
[Row] L1
L1 2.2E-09
L2 3.7E-10
[...]
[Row] L2
L2 1.69E-09
L3 6E-10
[...]
[Row] L3
L3 1.2E-09
L7 -6.59E-12
The inductance matrix is reasonable close...
[Capacitance Matrix] Sparse_Matrix
[...]
[Row] L1
L1 4.8E-13
L2 -3.47E-14
[...]
[Row] L2
L2 3.84E-13
L3 -1.05E-13
[...]
[Row] L3
L3 2.94E-13
L7 -4.26E-15
The capacitance matrix a little further off.
[Resistance Matrix] Banded_Matrix
[Bandwidth] 0
[...]
[Row] L1
-0.001546917
|
[Row] L2
-0.000994774
|
[Row] L3
-0.001111145
But the resistance matrix is off by a few orders of magnitude. I must
be missing something really basic. What am I not understanding here?
Or is this model just out of whack?
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